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From: john larkin <jl@650pot.com>
Newsgroups: sci.electronics.design
Subject: Re: CO2 Funny
Date: Tue, 28 May 2024 06:25:44 -0700
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On Tue, 28 May 2024 18:50:50 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:

>On 28/05/2024 1:54 am, john larkin wrote:
>> On Tue, 28 May 2024 01:05:18 +1000, Bill Sloman <bill.sloman@ieee.org>
>> wrote:
>> 
>>> On 27/05/2024 9:04 pm, john larkin wrote:
>>>> On Mon, 27 May 2024 15:05:14 +1000, Bill Sloman <bill.sloman@ieee.org>
>>>> wrote:
>>>>
>>>>> On 27/05/2024 4:22 am, Edward Rawde wrote:
>>>>>> "Bill Sloman" <bill.sloman@ieee.org> wrote in message news:v2uhs7$39s6m$1@dont-email.me...
>>>>>>> On 26/05/2024 4:38 am, Edward Rawde wrote:
>>>>>>>> "Bill Sloman" <bill.sloman@ieee.org> wrote in message news:v2na16$1nvei$1@dont-email.me...
>>>>>>>>> On 23/05/2024 3:52 am, john larkin wrote:
>>>>>>>>>> On Wed, 22 May 2024 18:10:58 +0100, Pomegranate Bastard <pommyB@aol.com> wrote:
>>>>>
>>>>> <snip>
>>>>>
>>>>>>> It usually takes a while to work out why they did it that way, and it's pretty much essential to spend that time before you start
>>>>>>> fiddling with the circuit. That wasn't true of the guy who'd put in the 741. He was very much in the John Larkin "if it sort of
>>>>>>> works, ship it" camp.
>>>>>>
>>>>>> Which of John Larkin's products have you purchased and tested and what improvement
>>>>>> do you think should have been made before it was shipped?
>>>>>
>>>>> Absolutely none of them. The timing gear he sells to the American
>>>>> National Ignition Facility is based on a 1978 Hewlett Packard scheme,
>>>>> written up in their journal, and it depends on starting up a 50MHz
>>>>> free-running oscillator in a very predictable way.
>>>>
>>>> Totally wrong, as usual. The NIF timing system is synchronous at
>>>> 155.52 MHz across over 200 timing modules, about 2000 "clients"
>>>> triggered every shot.
>>>>
>>>> https://highlandtechnology.com/Product/V880
>>>>
>>>> https://www.dropbox.com/scl/fi/74f60yne8cdlr53n1x1la/TUAP069.pdf?rlkey=4lp86ca0ztfuh055qyxtok9lm&dl=0
>>>
>>> That write-up doesn't mention the 1978 Hewlett-Packard Journal article
>>> which you have talked about here.
>>>
>>> It's a full bottle on the the 155.52 MHz timing scheme which is spread a
>>> across the whole site, which provides the start signal for your delay
>>> generators, but the individual delays generated don't depend on it at
>>> all (although it presumably provides the reference timing for any
>>> auto-calibration that you do)
>> 
>> You know nothing about this and are, as usual, all wrong. ALL the
>> module timing is based on the 155.52 MHz clock, which is generated by
>> a local PLL that is locked to the OC3 optical data stream.
>
>All the module timing may depend on the 155.52MHz master clock, but the 
>connection between edges on that clock and the signal the module puts 
>out to fire the laser is decidedly indirect.
>
>If you divided up the gaps between the 155.52MHz edges to generate your 
>1psec accurate laser driving pulses you'd be able to claim a direct 
>connection.
>
>155.52MHz is a bit slow for a master clock in such a system.
>
>>>>> Faster oscillators have less jitter, and while synchronising to a
>>>>> continuously running faster oscillator twice may introduce extra jitter,
>>>>> the net jitter on the time delay can be quite a bit less.
>>>>
>>>> We deliver 1 ps timing resolution and a few ps RMS jitter to clients
>>>> across a facility the size of a football stadium.
>>>
>>> Perhaps, but you clearly don't understand what you are actually doing,
>>> otherwise you wouldn't be claiming that I was totally wrong, or invoking
>>> their optically distributed master clock as if were part of your system.
>> 
>> Can you see the APC connector and the fiber?
>> 
>> https://highlandtechnology.com/Product/V880
>> 
>> The VCXO of the PLL is the shiny cube. It's mounted on tiny
>> custom-made springs to isolate it from shocks from un-mating the SMB
>> connectors.
>> 
>> Here's the PLL
>> 
>> https://www.dropbox.com/s/cobd3t4eorcsgrt/22S880D.pdf?raw=1
>> 
>> It uses a Dflop bang-bang ECL phase detector. I sure you don't
>> approve.
>
>The "circuit diagram" shows U11 as square block labelled ECL/VCO.
>

You have such a compulsion to be nasty that you don't even mind
looking silly.

U1 is a purchased ECL VCTCXO. A component on the "circuit diagram." 

What I posted is actually sheet 2 of the PADS schematic whose netlist
created the physical PC board and its BOM.  Sheet 1 of that 18 sheet
schematic is the block diagram. Our schematics always start with a
sheet-1 title sheet: block diagram, table of contents, filled-out
title block and, until formally released, progress notes.

(People rarely post schematics to SED.)

You actually don't know or care much about electronics, so there's no
point talking to you.