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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Lynn Wheeler <lynn@garlic.com> Newsgroups: comp.arch Subject: Re: Byte ordering Date: Thu, 03 Oct 2024 15:33:54 -1000 Organization: Wheeler&Wheeler Lines: 44 Message-ID: <87frpcslbx.fsf@localhost> References: <uigus7$1pteb$1@dont-email.me> <2024Jan11.080258@mips.complang.tuwien.ac.at> <hFeoN.153631$c3Ea.77560@fx10.iad> <ae65920bbb2ea09c74d0ea7584604b0f@www.novabbs.com> <sEWoN.224880$xHn7.139333@fx14.iad> <uvkh3q$ihej$2@dont-email.me> <uvl5hj$q0so$1@dont-email.me> <550600971b1a36b4b630c496cb21b96b@www.novabbs.org> <vdhkcs$2s651$1@dont-email.me> <0194054dac788f7e3a163726e84d72ac@www.novabbs.org> <vdi152$2u3v4$1@dont-email.me> <vdkolv$3ed1r$3@dont-email.me> <vdlgl9$3kq50$2@dont-email.me> <2024Oct3.113903@mips.complang.tuwien.ac.at> <vdn55j$3ssv4$11@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Injection-Date: Fri, 04 Oct 2024 03:33:57 +0200 (CEST) Injection-Info: dont-email.me; posting-host="4d2d64fc958af581a354c476557910f1"; logging-data="4148479"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18xdfmE3+2qPtN0IcL8scdZe3I66X42B60=" User-Agent: Gnus/5.13 (Gnus v5.13) Cancel-Lock: sha1:g3/KASLr67Bjpes2Q9gU/Pe4L5A= sha1:KKJt35/87mk66szZHAGmQ45bE34= Bytes: 3698 Lawrence D'Oliveiro <ldo@nz.invalid> writes: > I would say IBM designed 32-bit POWER/PowerPC as a cut-down 64-bit > architecture, needing only a few gaps filled to make it fully 64-bit. > > The PowerPC 601 was first shown publicly in 1993; I can’t remember when > the fully 64-bit 620 came out, but it can’t have been long after. > > Motorola did a similar thing with the 68000 family: if you compare the > original 68000 instruction set with the 68020, you will see the latter > only needed to fill in a few gaps to become fully 32-bit. > > Compare this with the pain the x86 world went through, over a much longer > time, to move to 32-bit. power/pc was done at Somerset ... part of AIM; apple, ibm, motorola ... and some of amount of motorola risc 88k contributed to power/pc https://en.wikipedia.org/wiki/PowerPC https://en.wikipedia.org/wiki/PowerPC_600 https://en.wikipedia.org/wiki/PowerPC_600#60x_bus Using the 88110 bus as the basis for the 60x bus helped schedules in a number of ways. It helped the Apple Power Macintosh team by reducing the amount of redesign of their support ASICs and it reduced the amount of time required for the processor designers and architects to propose, document, negotiate, and close a new bus interface (successfully avoiding the "Bus Wars" expected by the 601 management team if the 88110 bus or the previous RSC buses hadn't been adopted). Worthy to note is that accepting the 88110 bus for the benefit of Apple's efforts and the alliance was at the expense of the first IBM RS/6000 system design team's efforts who had their support ASICs already implemented around the RSC's totally different bus structure. .... note that RS/6000 didn't have design that supported cache consistency, shared-memory multiprocessing ... (one of the reason ha/cmp had to resort to cluster operation for scale-up) https://en.wikipedia.org/wiki/PowerPC_600#PowerPC_620 https://wiki.preterhuman.net/The_Somerset_Design_Center the executive we reported to when we were doing HA/CMP https://en.wikipedia.org/wiki/IBM_High_Availability_Cluster_Multiprocessing went over to head up Somerset -- virtualization experience starting Jan1968, online at home since Mar1970