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From: quadibloc <quadibloc@gmail.com>
Newsgroups: comp.arch
Subject: Re: Why I've Dropped In
Date: Fri, 13 Jun 2025 10:43:37 +0000
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On Tue, 10 Jun 2025 22:53:27 +0000, quadibloc wrote:

> My latest brainstorm?
>
> Include pairs of short instructions as part of the ISA, but make the
> short instructions 14 bits long instead of 15 so they get only 1/16 of
> the opcode space. This way, the compromise is placed in something that's
> less important. In the CISC mode, 17-bit short instructions will still
> be present, after all.

I was happy enough with this one, as it led to a more straightforward
architecture that had enough opcode space for everything, that I've now
proceeded to start fleshing out the architecture, as it appeared that my
days of running around in circles were finally over.

However, I did find that I had to make the architecture a bit more
complicated and kludgey in one place. The 48-bit instructions just did
not have enough opcode space. I managed to find a way to deal with this,
inelegant though it may be.

John Savard