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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: is Vax adressing sane today
Date: Sun, 8 Sep 2024 00:52:25 +0000
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On Fri, 6 Sep 2024 6:05:35 +0000, Anton Ertl wrote:

> jgd@cix.co.uk (John Dallman) writes:
>>Memory-to-memory instructions, in general, are hard to get to run fast
>>with today's processors and memory, simply because memory access times
>>are long enough for many register-to-register instructions to execute.
>
> Given modern OoO technology, even VAX can fly.  It does not matter
> whether, say,
>
> *a++ = *b++ + *c++;
>
> is encoded as 1 VAX instruction, or as 4 ARM A64 instructions, or as 7
> RISC-V instructions, what goes on inside the OoO engine is pretty
> similar in all cases, and so is the performance.

When I faced a similar set of desires, I had my movememory MM
instruction do::

     for( control_register = 0,
          control_register < Rs3,
          control+register+=size )
          rd[control_register] = rs1[control_register];

where size is determined by alignment, memory type (from PTE).
Thus, when a page fault or interrupt cuts the instruction in
the middle I don't have to recover any of the registers.

This also allows the instruction to be thrown over to the
Memory Function Unit and be performed in parallel with other
calculation instructions.

Getting back to the originating:: It is faster these days to
write::
     a[i] = b[i] + c[i];i++;
than the pre/post increment/decrement style of PDP-11.