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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: is Vax addressing sane today
Date: Sun, 22 Sep 2024 02:26:33 +0000
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On Sun, 22 Sep 2024 2:10:40 +0000, Lawrence D'Oliveiro wrote:

> On Sun, 22 Sep 2024 01:23:35 +0000, MitchAlsup1 wrote:
>
>> On Sat, 21 Sep 2024 23:29:01 +0000, Lawrence D'Oliveiro wrote:
>>
>>> On Sat, 21 Sep 2024 20:39:38 +0000, MitchAlsup1 wrote:
>>>
>>>> In the days before <good> branch prediction having a conditional
>>>> branch after each instruction that could have an execution problem was
>>>> an extremely poor choice. Thus, exceptions were invented (circa 1958).
>>>
>>> So all that does is push the conditional branch into the microcode. And
>>> make the instruction more complicated. Why should that be faster?
>>
>> It pushes the branch into the mispredict-recovery path and does not
>> occupy any code space.
>>
>> There is no microcode outside of Z-system these days.
>
> It occupies some space, either microcode or circuit logic, or both.

It has sequencers, but none of them are in ROM or PLA form.

> And why should that be faster?

It is faster if for no other reason that it did not fetch the branch
that is always predicted non-taken. ICache and Fetch argument. It is
of lower power because it did not fetch, decode, or execute the branch.

If every calculation instruction had to be followed by a conditional
branch, then the code would be 150% its original size (or worse).