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From: Richard Damon <richard@damon-family.org>
Newsgroups: comp.theory
Subject: Re: DD correctly emulated by HHH --- Totally ignoring invalid
 rebuttals ---PSR---
Date: Sat, 8 Mar 2025 18:12:10 -0500
Organization: i2pn2 (i2pn.org)
Message-ID: <91509698341229b1b824b34af2b2c4f46485c408@i2pn2.org>
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On 3/8/25 11:01 AM, olcott wrote:
> On 3/8/2025 7:54 AM, Richard Damon wrote:
>> On 3/7/25 9:22 PM, olcott wrote:
>>> On 3/7/2025 8:00 PM, Richard Damon wrote:
>>>> On 3/7/25 8:09 PM, olcott wrote:
>>>>> On 3/7/2025 9:33 AM, dbush wrote:
>>>>>> On 3/7/2025 10:30 AM, olcott wrote:
>>>>>>> On 3/7/2025 9:15 AM, Fred. Zwarts wrote:
>>>>>>>> Op 07.mrt.2025 om 15:49 schreef olcott:
>>>>>>>>> On 3/7/2025 2:02 AM, joes wrote:
>>>>>>>>>> Am Thu, 06 Mar 2025 20:59:49 -0600 schrieb olcott:
>>>>>>>>>>> On 3/6/2025 6:37 PM, Richard Damon wrote:
>>>>>>>>>>>> On 3/6/25 3:16 PM, olcott wrote:
>>>>>>>>>>>>> On 3/6/2025 3:17 AM, Fred. Zwarts wrote:
>>>>>>>>>>>>>> Op 06.mrt.2025 om 05:46 schreef olcott:
>>>>>>>>>>>>>>> On 3/5/2025 5:36 PM, Richard Damon wrote:
>>>>>>>>>>>>>>>> On 3/5/25 4:03 PM, dbush wrote:
>>>>>>>>>>>>>>>>> On 3/5/2025 3:55 PM, olcott wrote:
>>>>>>>>>>>>>>>>>> On 3/5/2025 10:14 AM, joes wrote:
>>>>>>>>>>>>>>>>>>> Am Wed, 05 Mar 2025 08:10:00 -0600 schrieb olcott:
>>>>>>>>>>>>>>>>>>>> On 3/5/2025 6:19 AM, Richard Damon wrote:
>>>>>>>>>>>>>>>>>>>>> On 3/5/25 12:09 AM, olcott wrote:
>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>>> I WILL NOT TOLERATE ANY OTHER ORDER
>>>>>>>>>>>>>>>>>>>>> In other words, you CAN'T handle any other order, 
>>>>>>>>>>>>>>>>>>>>> even though
>>>>>>>>>>>>>>>>>>>>> logically requried, because you need to hide your 
>>>>>>>>>>>>>>>>>>>>> fraud.
>>>>>>>>>>>>>>>>>>>> My proof requires a specific  prerequisite order.
>>>>>>>>>>>>>>>>>>>> One cannot learn algebra before one has learned to 
>>>>>>>>>>>>>>>>>>>> count to
>>>>>>>>>>>>>>>>>>>> ten. DD correctly emulated by HHH cannot possibly 
>>>>>>>>>>>>>>>>>>>> reach its own
>>>>>>>>>>>>>>>>>>>> "ret" instruction and terminate normally.
>>>>>>>>>>>>>>>>>>>> Is the first step of the mandatory prerequisite 
>>>>>>>>>>>>>>>>>>>> order of my
>>>>>>>>>>>>>>>>>>>> proof
>>>>>>>>>>>>>>>>>>> What is the next step?
>>>>>>>>>>>>>>>>>> *DD correctly emulated by HHH cannot possibly reach*
>>>>>>>>>>>>>>>>>> *its own "ret" instruction and terminate normally*
>>>>>>>>>>>>>>>>>> It has taken two years to create this first step such 
>>>>>>>>>>>>>>>>>> that it is
>>>>>>>>>>>>>>>>>> the the simplest way to state the key element of the 
>>>>>>>>>>>>>>>>>> whole proof
>>>>>>>>>>>>>>>>>> and make this element impossible to correctly refute.
>>>>>>>>>>>>>>>>>> EVERY ATTEMPT TO CHANGE THE SUBJECT AWAY FROM THIS 
>>>>>>>>>>>>>>>>>> POINT IS
>>>>>>>>>>>>>>>>>> DISHONEST.
>>>>>>>>>> So what's the next step?
>>>>>>>>>>
>>>>>>>>>>>>>>>>> Before agreeing on an answer, it is first required to 
>>>>>>>>>>>>>>>>> agree on the
>>>>>>>>>>>>>>>>> question.
>>>>>>>>>>>>>>>> Which is the problem, since you don't have the correct 
>>>>>>>>>>>>>>>> question.
>>>>>>>>>>>>>>>> If HHH is a Halt Decider / Termination analyzer, the 
>>>>>>>>>>>>>>>> ONLY behavior
>>>>>>>>>>>>>>>> that matters is the behavior of the directly executed 
>>>>>>>>>>>>>>>> program whose
>>>>>>>>>>>>>>>> description is provided.
>>>>>>>>>>>>>>> That is a stupid thing to say.
>>>>>>>>>>>>>>> HHH computes the mapping to a return value on the basis 
>>>>>>>>>>>>>>> of what its
>>>>>>>>>>>>>>> finite string INPUT specifies.
>>>>>>>>>> Yes, that is the directly executed program.
>>>>>>>>>>
>>>>>>>>>>>>>>> THIS IS WHAT IT SPECIFIES *DD correctly emulated by HHH 
>>>>>>>>>>>>>>> cannot
>>>>>>>>>>>>>>> possibly reach its own "ret" instruction and terminate 
>>>>>>>>>>>>>>> normally*
>>>>>>>>>> No, DD doesn't specify anything about what is to simulate it.
>>>>>>>>>>
>>>>>>>>>>>>>> Yes, that is what HHH reports: I cannot complete the 
>>>>>>>>>>>>>> simulation up to
>>>>>>>>>>>>>> the end. No more, no less.
>>>>>>>>>>>>>> There are easier ways to make a program to report the 
>>>>>>>>>>>>>> failure of a
>>>>>>>>>>>>>> simulation.
>>>>>>>>>>>>> The finite string of DD correctly emulated by HHH specifies 
>>>>>>>>>>>>> recursive
>>>>>>>>>>>>> emulation that cannot possibly reach its own "ret" 
>>>>>>>>>>>>> instruction BECAUSE
>>>>>>>>>>>>> IT SPECIFIES RECURSINVE EMULATION.
>>>>>>>>>> No, HHH aborts.
>>>>>>>>>>
>>>>>>>>>>>> But the HHH that decides are returns can't be that HHH, so 
>>>>>>>>>>>> the DD given
>>>>>>>>>>>> to that HHH doesn't call the correctly emulating HHH, so you 
>>>>>>>>>>>> whole
>>>>>>>>>>>> argument is shown to be the fraud you have admitted to.
>>>>>>>>>>> That seems to be a little incoherent so I cannot tell what 
>>>>>>>>>>> you are
>>>>>>>>>>> saying yet you are at least attempting to use reasoning.
>>>>>>>>>>> I am just saying what the actual x86 machine code actually 
>>>>>>>>>>> specifies
>>>>>>>>>>> therefore any rebuttal is necessarily incorrect.
>>>>>>>>>
>>>>>>>>>> And the actual code of DD specifies that it halts.
>>>>>>>>>>
>>>>>>>>> *Straw-man deception*
>>>>>>>>>
>>>>>>>>> DD correctly emulated by HHH cannot possibly
>>>>>>>>> reach its own "ret" instruction and terminate normally
>>>>>>>>> because DD calls HHH(DD) in recursive emulation.
>>>>>>>>>
>>>>>>>> Strawman. HHH fails to reach the 'ret' instruction, so HHH fails 
>>>>>>>> to do a compete simulation.
>>>>>>>
>>>>>>> Simulating termination analyzer HHH 
>>>>>>
>>>>>> So you're saying it maps the halting function?
>>>>>>
>>>>>> (<X>,Y) maps to 1 if and only if X(Y) halts when executed directly
>>>>>> (<X>,Y) maps to 0 if and only if X(Y) does not halt when executed 
>>>>>> directly
>>>>>>
>>>>>>
>>>>>
>>>>> DD correctly emulated by HHH cannot possibly
>>>>> reach its own "ret" instruction and terminate normally
>>>>> because DD calls HHH(DD) in recursive emulation.
>>>>>
>>>>>
>>>>
>>>> And the HHH that correctly emulated the DD can't possibly answer, 
>>>
>>> That is stupidly wrong and you know it.
>>>
>>
>> It is something you yourself have proven. I guess you are calling 
>> yourself a liar.
>>
>>
>> Of course, your problem is that you logic is just inconsistant since 
>> it is based on lies and fraud, so you think you have also proved the 
>> opposite.
>>
>> Sorry, you admitted that you work is based on the fraud of 
>> redefinition of core state-of-art terms, and thus nothing you say 
>> actual has value or can be made sense of.
>>
>> You have destroyed your reputation by handing your work on such basic 
>> and intentional errors that no one will trust anything you said, 
>> because you contradict yourself so often.
> 
> Yet when I  challenge you to point out any errors you only have:
> (a) Mere empty rhetoric entirely bereft of any supporting
> reasoning. (see above)
> 
> (b) Counter-factual statements that are proven false.
> by the actual behavior specified by the source code
> and the semantics of the x86 language.
> 

No, I have pointed out in DETAIL your errors but you have just 
overlooked them, often taking care to trim them out of your replies, 
showing it is a DELIBRATE act of deception to make the claims.

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