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From: quadibloc <quadibloc@gmail.com>
Newsgroups: comp.arch
Subject: Re: Why I've Dropped In
Date: Wed, 11 Jun 2025 15:29:17 +0000
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On Tue, 10 Jun 2025 22:53:27 +0000, quadibloc wrote:

> My latest brainstorm?
>
> Include pairs of short instructions as part of the ISA, but make the
> short instructions 14 bits long instead of 15 so they get only 1/16 of
> the opcode space. This way, the compromise is placed in something that's
> less important. In the CISC mode, 17-bit short instructions will still
> be present, after all.

After writing this, I was very unsure if I really could squeeze the
opcode space in use by other parts of the instruction set to actually
manage this, because I would still need to make other changes.

But I have found a way.

John Savard