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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Stealing a Great Idea from the 6600
Date: Thu, 20 Jun 2024 02:44:21 +0000
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EricP wrote:

> MitchAlsup1 wrote:
>> 
>> One of the things we found in Mc 88120 was that the compiler should
>> NEVER
>> be allowed to put unnecessary instructions in decode-execute slots that
>> were unused--and that almost invariable--the best code for the GBOoO 
>> machine was almost invariably the one with the fewest instructions, and
>> if several sequences had equally few instructions, it basically did not
>> matter.
>> 
>> For example::
>> 
>>     for( i = 0; i < max, i++ )
>>          a[i] = b[i];
>> 
>> was invariably faster than::
>> 
>>     for( ap = &a[0], bp = & b[0];, i = 0; i < max; i++ )
>>          *ap++ = *bp++;
>> 
>> because the later has 3 ADDs in the loop wile the former has but 1.
>> Because of this, I altered my programming style and almost never end up
>> using ++ or -- anymore.

By the way:: The statement about Always applies to Mc 881x0's and a few
other RISC architectures with indexed address modes.

> The 88000 had a scaled-indexed address mode on LD and ST.
> Alpha didn't but had a scaled-indexed S8ADDQ (aka LEA) instruction.
> ISA's that didn't used individual shifts and adds (like real RISC's
> do!)
> so for them an optimizing compiler converting to the ++ form is
> optimal,
> and might be folded into an auto-increment address mode.

No disagreement when other architectures made different choices getting

to where they got.