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NNTP-Posting-Date: Fri, 24 May 2024 14:38:13 +0000
From: john larkin <jl@650pot.com>
Newsgroups: sci.electronics.design
Subject: Re: An actual circuit
Date: Fri, 24 May 2024 07:38:12 -0700
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On Thu, 23 May 2024 13:06:46 -0700, john larkin <jl@650pot.com> wrote:

>On Thu, 23 May 2024 15:35:00 -0400, "Edward Rawde"
><invalid@invalid.invalid> wrote:
>
>>I was having a conversation with a younger person who seemed to be of the 
>>view that to make an LED flash you would need something to decide when it 
>>should be on or off. So that would be some kind of software or digital 
>>system.
>>
>>This reminded me of when, in my teen years, I was curious about how slow I 
>>could make an LED flash without using any expensively large capacitors.
>>
>>I built a circuit like the one below but it needed a kick starter (another 
>>resistor, larger capacitor and diode) to make it go at power on.
>>
>>LTSpice says the circuit below starts up with only a little imbalance in the 
>>values of R2 and R6 but how can I be sure that a real circuit will do this 
>>when component tolerances are taken into account?
>>
>>Watch out for line wraps and 0.1 uF character encoding issues.
>
>
>The jfet astable is cute.
>
>I had a high-voltage supply and wanted to blink an LED when there was
>potentially dangerous voltage. I used a Supertex depletion fet to
>charge a cap, and a diac to dump into the LED at about 1 Hz. Five
>parts, including the LED.
>
>

The classic NPN astable circuit can hang up, with both transistors
saturated. I wonder if he jfet circuit can hang too, with Idss
grounding both drains and not enough gain to oscillate out of that
state.

Even when they have a hang state, luck usually kicks them off into
oscillation. Your source resistors and  asymmetric drain resistors
help it start up. Try making both drain resistors 3.3K.

If you make the source resistors lower, it will hang up.