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NNTP-Posting-Date: Tue, 16 Apr 2024 22:06:49 +0000
From: john larkin <jl@650pot.com>
Newsgroups: sci.electronics.design
Subject: Re: Predictive failures
Date: Tue, 16 Apr 2024 15:06:49 -0700
Message-ID: <bvst1j1qkoe7gu2l2s1qu9irs476oti9mf@4ax.com>
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On Tue, 16 Apr 2024 13:25:07 -0000 (UTC), "Don" <g@crcomp.net> wrote:

>Don Y wrote:
>> Is there a general rule of thumb for signalling the likelihood of
>> an "imminent" (for some value of "imminent") hardware failure?
>>
>> I suspect most would involve *relative* changes that would be
>> suggestive of changing conditions in the components (and not
>> directly related to environmental influences).
>>
>> So, perhaps, a good strategy is to just "watch" everything and
>> notice the sorts of changes you "typically" encounter in the hope
>> that something of greater magnitude would be a harbinger...
>
>A singular speculative spitball - the capacitive marker:
>
>    In-situ Prognostic Method of Power MOSFET Based on Miller Effect
>
>    ... This paper presents a new in-situ prognosis method for
>    MOSFET based on miller effect. According to the theory
>    analysis, simulation and experiment results, the miller
>    platform voltage is identified as a new degradation
>    precursor ...
>
>    (10.1109/PHM.2017.8079139)
>
>Danke,

Sounds like they are really measuring gate threshold, or gate transfer
curve, drift with time. That happens and is usually no big deal, in
moderation. Ions and charges drift around. We don't build opamp
front-ends from power mosfets.

This doesn't sound very useful for "in-situ" diagnostics.

GaN fets can have a lot of gate threshold and leakage change over time
too. Drive them hard and it doesn't matter.