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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: My 66000 and High word facility
Date: Tue, 13 Aug 2024 17:24:30 +0000
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On Tue, 13 Aug 2024 3:50:04 +0000, BGB wrote:

> On 8/12/2024 8:23 PM, MitchAlsup1 wrote:
>> On Tue, 13 Aug 2024 0:34:55 +0000, BGB wrote:
>>
>>> On 8/12/2024 5:35 PM, MitchAlsup1 wrote:
>>>> On Mon, 12 Aug 2024 20:58:45 +0000, BGB wrote:
>>>>
>>>>> On 8/12/2024 3:12 PM, MitchAlsup1 wrote:
>>>>
>>>>>> See polpak:: r8_erf()
>>>>>>
>>>>>>
>>>>>> r8_erf:                                 ; @r8_erf
>> <snip>
>>>>
>>>> Why don't yuo download polpack, compile it, and state how many
>>>> instructions it takes and how many words of storage it takes ??
>>>
>>> Found what I assume you are talking about.
>>>
>>> Needed to add "polpak_test.c" as otherwise BGBCC lacks a main and prunes
>>> everything;
>>> Also needed to hack over some compiler holes related to "complex
>>> _Double" to get it to build;
>>> Also needed to stub over some library functions that were added in C99
>>> but missing in my C library.
>>
>> I only ask for r8_erf()
>>>
>> <snip>
>>
>>> As for "r8_erf()":
>>>
>>> <===
>>>
>>> r8_erf:
>> <snip>
>>
>> I count 283 instructions compared to my 85 including the 104
>> instructions
>> it takes your compiler to get to the 1st instruction in My 66000 code !!
>>
>
> Yeah, this is a compiler issue...

Why not sit down and code it in ASM to see what your ISA can really do?
Feel free to use My 66000 code as an example.

> It might have been less if the code was like:
>    static const double somearr[8]={ ... };
>
> But, this would still have used memory loads.
> Getting the constants into expressions would likely require using
> #define or similar...
>
> This is admittedly more how I would have imagined performance-oriented
> code to be written. Not so much with dynamically initialized arrays.

That particular piece of code was originally written in FORTRAN
probably late 1960s or early 1970s then ported to C a while back.

<snip>
>
> But, as I will note, even with this general level of lackluster code
> generation, have still been managing to often beat RV64G performance...

Anybody claiming RISC-V has a good ISA should have their degree revoked.