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From: mitchalsup@aol.com (MitchAlsup1)
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Subject: Re: Byte Addressability And Beyond
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Terje Mathisen wrote:

> 

> That logic already exists, in the form of a single thread/core
> dedicated
> to the job.

> With 30-100 cores on a single die, it becomes very cheap to dedicate
> one
> of them to babysit such a process, compared to the cost of making a 
> custom chunk of VLSI to do the same. This is particularly true because 
> the logic needed in the babysitting process is mostly straight line, 
> with a very limited number of hard-to-predict branches.

> I.e. h.264 CABAC decoding has three branches per bit decoded, at least 
> one of them impossible to predict or work around with clever coding. 

How many instructions in the then-clause and in the else-clause ??
If these are smaller than 8, My 66000 can process them without
"branching"
using predication.

> Here it makes perfect sense to have a chunk of hw to handle the heavy 
> lifting. Monitoring block encryption/decryption not so much.

> Terje