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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: stack sizes, Segments
Date: Thu, 23 Jan 2025 20:04:49 +0000
Organization: Rocksolid Light
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On Thu, 23 Jan 2025 19:45:11 +0000, Scott Lurndal wrote:

> mitchalsup@aol.com (MitchAlsup1) writes:
>>On Thu, 23 Jan 2025 14:00:41 +0000, Scott Lurndal wrote:
>>
>>> mitchalsup@aol.com (MitchAlsup1) writes:
>>>>On Thu, 23 Jan 2025 1:07:02 +0000, Scott Lurndal wrote:
>>>>
>>>
>>>>>>Do you mean "there is no equivlent *POSIX* function", right?
>>>>>>But I sincerily hope that most Unix-like systems provide such
>>>>>>functionality in system-specific manner. Because it looks usable.
>>>>>
>>>>> What would an application (portable or otherwise) use the process
>>>>> stack base address for?
>>>>
>>>>As a place to put TLS (or &TLS) on register-starved architectures.
>>>
>>> That's a function of the implementation, not the programmer.
>>
>>The compiler needs to know a way of getting TLS in a register starved
>>ISA.
>
> The compiler is part of the "implementation".   Very few programmers
> work on compilers for register starved architectures (of which few
> are still in common use). And very few of them care about the
> stack base address.
>
>
>>     {This is why segmentation bled over into x86-64}
>
> Well, it gave them a couple scratch registers for use as
> kernel and user-mode thread specific region pointers (fs, gs).
>
> However, I doubt that played a huge factor in AMD keeping what's
> left of 80286 segments, they could have just re-used the
> encodings for FS and GS for new GPRs and reserved them for
> TLS in ABI's for implementations that support threads.

We had long conversations about what to leave in and what to take
(back) out.