Path: ...!eternal-september.org!feeder2.eternal-september.org!i2pn.org!i2pn2.org!.POSTED!not-for-mail
From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Arm ldaxr / stxr loop question
Date: Sun, 10 Nov 2024 02:44:39 +0000
Organization: Rocksolid Light
Message-ID: <df7ab68548da7c1691b4f1c8b3f3d685@www.novabbs.org>
References: <vfono1$14l9r$1@dont-email.me> <vgjvsv$31l0n$1@dont-email.me> <E5pXO.86774$TpU4.12115@fx41.iad> <vgoni8$ib$1@dont-email.me> <W4SXO.278128$WtV9.16170@fx10.iad> <f9e9f6672e6a3aee798231ace65392e0@www.novabbs.org> <vgp2ol$268r$5@dont-email.me>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Transfer-Encoding: 8bit
Injection-Info: i2pn2.org;
	logging-data="1759590"; mail-complaints-to="usenet@i2pn2.org";
	posting-account="o5SwNDfMfYu6Mv4wwLiW6e/jbA93UAdzFodw5PEa6eU";
User-Agent: Rocksolid Light
X-Spam-Checker-Version: SpamAssassin 4.0.0
X-Rslight-Site: $2y$10$v84d0F9x6cfTWGUMfqUJDOyzWFk4zkdfaMK6qT/uYdd8lO1MFfQUK
X-Rslight-Posting-User: cb29269328a20fe5719ed6a1c397e21f651bda71
Bytes: 2074
Lines: 27

On Sun, 10 Nov 2024 1:37:26 +0000, Lawrence D'Oliveiro wrote:

> On Sun, 10 Nov 2024 01:26:22 +0000, MitchAlsup1 wrote:
>
>> It reads better without explanation ...
>
> Reminds me of the “EIEIO” instruction from IBM POWER (or was it only
> PowerPC).
>
> Can anybody find any other example of any IBM engineer ever having a
> sense of humour?

We got past our censors (management) a control register
in Mc 88100 called FPECR -- Floating Point Exception
Control Register. We were rather happy about it, too.

Ed Rupp (wrote the 68020/30) µCode assembler. Due to the
way we implemented µROM, we could interchange rows and
columns to optimize various stuff. We (the engineers)
got together one night and rearranged the rows and
columns such that if you looked at µROM from a good
distance back, you would see "Moto Man Lives" in bits
across the ROM. ...
Actually got in trouble for that one ...

> Ever?
>
> Anybody?