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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: is Vax addressing sane today
Date: Sat, 21 Sep 2024 20:39:38 +0000
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On Sat, 21 Sep 2024 17:05:02 +0000, EricP wrote:

> Kent Dickey wrote:

>> Basically, all a) cases are:
>>
>> 	op_with_might_overflow();
>> 	if(overflow_happened) {
>> 		handle the overflow
>> 	}
>>
>> Trapping-on-overflow instructions are clearly useless for languages
>> which care about overflow.
>
> This conclusion is completely wrong.

In the days before <good> branch prediction having a conditional branch
after each instruction that could have an execution problem was an
extremely poor choice. Thus, exceptions were invented (circa 1958).

Now with good branch prediction, having a branch after each instruction
which could suffer an execution problem is simply a bad was to blow
up the size of the executable.

> Exceptions are an event detection and notification delivery mechanism.

Exceptions are a free (easy to predict) branch.

> It is very efficient if those events are rarely or never supposed to
> occur.

Many (most, nearly all) processor architectures have notoriously
bad exception delivery to a point of control that can deal with
the problem at hand.

But it is not necessary for that bad mechanism to be necessary !!

Some of the things that minimize the "badness" of taking an exception::

a) deliver control to user signal handler without taking an
   excursion through GuestOS. (think 10 cycles)
b) when control arrives, receiving thread is already reentrant.
c) when control arrives, the instruction (bits) and its operand
   values are delivered to the exception handler. So, the exception
   handler has what it needs to deal with the problem at hand.
d) when control returns, the result (R0) is delivered back to the
   destination register.
e) (b, c, d) are performed without handler needing to understand
   how. Handler is just a subroutine that receives arguments (c)
   fixes the problem, and returns a non-excepting value, or abort.
f) return has a way to re-execute the instruction or to skip the
   instruction under control of handler without having access
   to excepting-IP and without knowing the length of the
   instruction.
g) during (a..f) nobody ever has to disable interrupts or
   exceptions or re-enable them later. Priority and privilege
   are inherited automatically from excepting thread.


I know of only 1 ISA with these properties....