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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: JM <sunaecoNoSpam@gmail.com> Newsgroups: sci.electronics.design Subject: Re: Advice for active FPGA forums Date: Fri, 11 Oct 2024 23:02:07 +0100 Organization: A noiseless patient Spider Lines: 34 Message-ID: <et7jgj1b5nsbe51nusour443snr2df7g4r@4ax.com> References: <vec3fc$2imec$1@news2.open-news-network.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Injection-Date: Sat, 12 Oct 2024 00:02:11 +0200 (CEST) Injection-Info: dont-email.me; posting-host="5dedf8b5d348f52fa44df7ae67b6b362"; logging-data="4024216"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+H1jxGyw7wHwcQspp7aLyV" User-Agent: ForteAgent/8.00.32.1272 Cancel-Lock: sha1:cTIoBKG0wu9O1TG/sCDIOMHIsR4= Bytes: 2379 On Fri, 11 Oct 2024 21:57:16 +0100, Mike Perkins <spam@spam.invalid> wrote: >I am currently using an Intel Cyclone V, a 5CEBA2F23C8N and a LPDDR2 memory. > >The reason for this initial choice is due to a Terasic development board >that used a Altera/Intel high end Cyclone V device with a functioning >LPDDR2 IP. Some code was breadboarded here. > >Unfortunately I can't get the LPDDR2 IP to work on my PCB. I get errors >and I have given up. > >So I have made my own interface. This 'can' function fine without error, >but as the design has become more complex I now struggle for the memory >to function at 225MHz clock speed, being the minimum speed I need for a >32bit DDR2 memory. I can select clock phase for the internal clock, >memory clock and DQS strobes. > >I'm struggling with setting clock speed and appropriate timing where the >timing simply fails, despite setting the options to max speed. The >delays are simply too many ns. > >In short I am throwing in the towel with a view to reconsidering >alternative architectures and FPGAs. I should be able to reuse most of >my code. > >I was wondering if anyone could recommend a generic type of forum that >could assist with feedback. Yes I know there are AMD and Intel FPGA >sites but they are very specific to those makes. > >There is comp.arch.fpga but that's pretty much defunct. > >Any suggestions? Post on eevblog, showing your PCB layout.