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Path: ...!weretis.net!feeder9.news.weretis.net!news.nk.ca!rocksolid2!i2pn2.org!.POSTED!not-for-mail From: Richard Damon <richard@damon-family.org> Newsgroups: comp.theory Subject: Re: DD correctly emulated by HHH --- Totally ignoring invalid rebuttals ---PSR--- Date: Fri, 7 Mar 2025 21:00:23 -0500 Organization: i2pn2 (i2pn.org) Message-ID: <fcb35e8f9e81e513ae37369bc224f02a43d0c4e4@i2pn2.org> References: <vq5qqc$1j128$2@dont-email.me> <vq751g$1t7oc$1@dont-email.me> <vq78ni$1u8bl$3@dont-email.me> <5e786c32c2dcc88be50183203781dcb6a5d8d046@i2pn2.org> <vq866t$23nt0$1@dont-email.me> <2002d599ebdfb7cd5a023881ab2faca9801b219d@i2pn2.org> <vq8l3d$29b9l$1@dont-email.me> <4426787ad065bfd0939e10b937f3b8b2798d0578@i2pn2.org> <vq8mam$29b9l$5@dont-email.me> <920b573567d204a5c792425b09097d79ee098fa5@i2pn2.org> <vq9lvn$2ei4j$3@dont-email.me> <4453bc0c1141c540852ea2223a7fedefc93f564c@i2pn2.org> <vqadoh$2ivg7$2@dont-email.me> <vqae74$2ivcn$1@dont-email.me> <3d74bde656131ddb2a431901b3a0aeeb71649e70@i2pn2.org> <vqb9ao$2mueq$6@dont-email.me> <vqbp6h$2td95$2@dont-email.me> <vqcvr3$34c3r$4@dont-email.me> <3e49cecf2307c385ab65edcfb375b8ad54480402@i2pn2.org> <vqdnf6$380b4$2@dont-email.me> <76a4db051a2d8043a7cafd46f5dfbdfdb005ca96@i2pn2.org> <vqf119$3j68u$1@dont-email.me> <vqf2i6$3j47v$1@dont-email.me> <vqf3e6$3j68u$9@dont-email.me> <vqf3ks$3j1hs$1@dont-email.me> <vqg5bk$3qe49$1@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Date: Sat, 8 Mar 2025 02:00:23 -0000 (UTC) Injection-Info: i2pn2.org; logging-data="3366314"; mail-complaints-to="usenet@i2pn2.org"; posting-account="diqKR1lalukngNWEqoq9/uFtbkm5U+w3w6FQ0yesrXg"; User-Agent: Mozilla Thunderbird X-Spam-Checker-Version: SpamAssassin 4.0.0 Content-Language: en-US In-Reply-To: <vqg5bk$3qe49$1@dont-email.me> Bytes: 7331 Lines: 120 On 3/7/25 8:09 PM, olcott wrote: > On 3/7/2025 9:33 AM, dbush wrote: >> On 3/7/2025 10:30 AM, olcott wrote: >>> On 3/7/2025 9:15 AM, Fred. Zwarts wrote: >>>> Op 07.mrt.2025 om 15:49 schreef olcott: >>>>> On 3/7/2025 2:02 AM, joes wrote: >>>>>> Am Thu, 06 Mar 2025 20:59:49 -0600 schrieb olcott: >>>>>>> On 3/6/2025 6:37 PM, Richard Damon wrote: >>>>>>>> On 3/6/25 3:16 PM, olcott wrote: >>>>>>>>> On 3/6/2025 3:17 AM, Fred. Zwarts wrote: >>>>>>>>>> Op 06.mrt.2025 om 05:46 schreef olcott: >>>>>>>>>>> On 3/5/2025 5:36 PM, Richard Damon wrote: >>>>>>>>>>>> On 3/5/25 4:03 PM, dbush wrote: >>>>>>>>>>>>> On 3/5/2025 3:55 PM, olcott wrote: >>>>>>>>>>>>>> On 3/5/2025 10:14 AM, joes wrote: >>>>>>>>>>>>>>> Am Wed, 05 Mar 2025 08:10:00 -0600 schrieb olcott: >>>>>>>>>>>>>>>> On 3/5/2025 6:19 AM, Richard Damon wrote: >>>>>>>>>>>>>>>>> On 3/5/25 12:09 AM, olcott wrote: >>>>>> >>>>>>>>>>>>>>>>>> I WILL NOT TOLERATE ANY OTHER ORDER >>>>>>>>>>>>>>>>> In other words, you CAN'T handle any other order, even >>>>>>>>>>>>>>>>> though >>>>>>>>>>>>>>>>> logically requried, because you need to hide your fraud. >>>>>>>>>>>>>>>> My proof requires a specific prerequisite order. >>>>>>>>>>>>>>>> One cannot learn algebra before one has learned to count to >>>>>>>>>>>>>>>> ten. DD correctly emulated by HHH cannot possibly reach >>>>>>>>>>>>>>>> its own >>>>>>>>>>>>>>>> "ret" instruction and terminate normally. >>>>>>>>>>>>>>>> Is the first step of the mandatory prerequisite order of my >>>>>>>>>>>>>>>> proof >>>>>>>>>>>>>>> What is the next step? >>>>>>>>>>>>>> *DD correctly emulated by HHH cannot possibly reach* >>>>>>>>>>>>>> *its own "ret" instruction and terminate normally* >>>>>>>>>>>>>> It has taken two years to create this first step such that >>>>>>>>>>>>>> it is >>>>>>>>>>>>>> the the simplest way to state the key element of the whole >>>>>>>>>>>>>> proof >>>>>>>>>>>>>> and make this element impossible to correctly refute. >>>>>>>>>>>>>> EVERY ATTEMPT TO CHANGE THE SUBJECT AWAY FROM THIS POINT IS >>>>>>>>>>>>>> DISHONEST. >>>>>> So what's the next step? >>>>>> >>>>>>>>>>>>> Before agreeing on an answer, it is first required to agree >>>>>>>>>>>>> on the >>>>>>>>>>>>> question. >>>>>>>>>>>> Which is the problem, since you don't have the correct >>>>>>>>>>>> question. >>>>>>>>>>>> If HHH is a Halt Decider / Termination analyzer, the ONLY >>>>>>>>>>>> behavior >>>>>>>>>>>> that matters is the behavior of the directly executed >>>>>>>>>>>> program whose >>>>>>>>>>>> description is provided. >>>>>>>>>>> That is a stupid thing to say. >>>>>>>>>>> HHH computes the mapping to a return value on the basis of >>>>>>>>>>> what its >>>>>>>>>>> finite string INPUT specifies. >>>>>> Yes, that is the directly executed program. >>>>>> >>>>>>>>>>> THIS IS WHAT IT SPECIFIES *DD correctly emulated by HHH cannot >>>>>>>>>>> possibly reach its own "ret" instruction and terminate normally* >>>>>> No, DD doesn't specify anything about what is to simulate it. >>>>>> >>>>>>>>>> Yes, that is what HHH reports: I cannot complete the >>>>>>>>>> simulation up to >>>>>>>>>> the end. No more, no less. >>>>>>>>>> There are easier ways to make a program to report the failure >>>>>>>>>> of a >>>>>>>>>> simulation. >>>>>>>>> The finite string of DD correctly emulated by HHH specifies >>>>>>>>> recursive >>>>>>>>> emulation that cannot possibly reach its own "ret" instruction >>>>>>>>> BECAUSE >>>>>>>>> IT SPECIFIES RECURSINVE EMULATION. >>>>>> No, HHH aborts. >>>>>> >>>>>>>> But the HHH that decides are returns can't be that HHH, so the >>>>>>>> DD given >>>>>>>> to that HHH doesn't call the correctly emulating HHH, so you whole >>>>>>>> argument is shown to be the fraud you have admitted to. >>>>>>> That seems to be a little incoherent so I cannot tell what you are >>>>>>> saying yet you are at least attempting to use reasoning. >>>>>>> I am just saying what the actual x86 machine code actually specifies >>>>>>> therefore any rebuttal is necessarily incorrect. >>>>> >>>>>> And the actual code of DD specifies that it halts. >>>>>> >>>>> *Straw-man deception* >>>>> >>>>> DD correctly emulated by HHH cannot possibly >>>>> reach its own "ret" instruction and terminate normally >>>>> because DD calls HHH(DD) in recursive emulation. >>>>> >>>> Strawman. HHH fails to reach the 'ret' instruction, so HHH fails to >>>> do a compete simulation. >>> >>> Simulating termination analyzer HHH >> >> So you're saying it maps the halting function? >> >> (<X>,Y) maps to 1 if and only if X(Y) halts when executed directly >> (<X>,Y) maps to 0 if and only if X(Y) does not halt when executed >> directly >> >> > > DD correctly emulated by HHH cannot possibly > reach its own "ret" instruction and terminate normally > because DD calls HHH(DD) in recursive emulation. > > And the HHH that correctly emulated the DD can't possibly answer, just showing that your premise is just a frauc. Of course, you have admitted that, since you have stated that you are using non-standard definition for many of the core definition of the system, so you aren't actually working in the system, but just puting forward a FRAUD. Sorry, you have publically admitted the needed evidence, and doomed your theories. (as well, it seems, as your soul)