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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.quux.org!news.nk.ca!rocksolid2!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: Why VAX Was the Ultimate CISC and Not RISC Date: Fri, 7 Mar 2025 17:34:21 +0000 Organization: Rocksolid Light Message-ID: <fe70b48cd6fef0aaf89278163d8b6322@www.novabbs.org> References: <vpufbv$4qc5$1@dont-email.me> <2025Mar1.125817@mips.complang.tuwien.ac.at> <vpvrn5$2hq0$1@gal.iecc.com> <2025Mar1.232526@mips.complang.tuwien.ac.at> <vq2dfr$2skk$1@gal.iecc.com> <2025Mar2.234011@mips.complang.tuwien.ac.at> <5pkg9l-kipt.ln1@msc27.me.uk> <2025Mar3.174417@mips.complang.tuwien.ac.at> <vq4qav$1dksd$1@dont-email.me> <vq5dm2$1h3mg$5@dont-email.me> <2025Mar4.110420@mips.complang.tuwien.ac.at> <vq829a$232tl$6@dont-email.me> <2025Mar5.083636@mips.complang.tuwien.ac.at> <vqdljd$29f8f$2@paganini.bofh.team> <vqdrh9$3cdrc$1@dont-email.me> <vqek6h$3fro6$1@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="3313705"; mail-complaints-to="usenet@i2pn2.org"; posting-account="o5SwNDfMfYu6Mv4wwLiW6e/jbA93UAdzFodw5PEa6eU"; User-Agent: Rocksolid Light X-Rslight-Posting-User: cb29269328a20fe5719ed6a1c397e21f651bda71 X-Spam-Checker-Version: SpamAssassin 4.0.0 X-Rslight-Site: $2y$10$T2TMa4Uu0MKHgzWYvFJRi.DmRDsZ89Nv0C.FBtYs6cHMZEYfWB1Ya Bytes: 2378 Lines: 33 On Fri, 7 Mar 2025 11:08:56 +0000, BGB wrote: > On 3/6/2025 10:09 PM, Lawrence D'Oliveiro wrote: ---------------- > > So, writing things like: > y[55:48]=x[19:12]; 2 instructions in My 66000. One extract, one insert. > > And: > j=x[19:12]; > Also a single instruction, or 2 or 3 in the fallback case (encoded as a > shift and mask). 1 instruction--extract (SLL or SLA) ---------------------- > > For a simple test: > lj[ 7: 0]=li[31:24]; > lj[15: 8]=li[23:16]; > lj[23:16]=li[15: 8]; > lj[31:24]=li[ 7: 0]; > Does seem to compile down to 4 instructions. 1 innstruction:: BITR rd,rs1,<8> > Though, looking at the compiler code, it would be subject to the "side > effects in lvalue may be applied twice" bug: > (*ct++)[19:12]=(*cs++)[15:8]; 5 instructions:: LD, LD, EXT, INS, ST; with deferred ADD to Rcs and Rct.