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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Why VAX Was the Ultimate CISC and Not RISC
Date: Fri, 7 Mar 2025 17:34:21 +0000
Organization: Rocksolid Light
Message-ID: <fe70b48cd6fef0aaf89278163d8b6322@www.novabbs.org>
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On Fri, 7 Mar 2025 11:08:56 +0000, BGB wrote:

> On 3/6/2025 10:09 PM, Lawrence D'Oliveiro wrote:
----------------
>
> So, writing things like:
>    y[55:48]=x[19:12];

2 instructions in My 66000. One extract, one insert.

>
> And:
>    j=x[19:12];
> Also a single instruction, or 2 or 3 in the fallback case (encoded as a
> shift and mask).

1 instruction--extract (SLL or SLA)

----------------------
>
> For a simple test:
>    lj[ 7: 0]=li[31:24];
>    lj[15: 8]=li[23:16];
>    lj[23:16]=li[15: 8];
>    lj[31:24]=li[ 7: 0];
> Does seem to compile down to 4 instructions.

1 innstruction:: BITR rd,rs1,<8>

> Though, looking at the compiler code, it would be subject to the "side
> effects in lvalue may be applied twice" bug:
>    (*ct++)[19:12]=(*cs++)[15:8];

5 instructions:: LD, LD, EXT, INS, ST; with deferred ADD to Rcs and Rct.