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From: John Savard <quadibloc@servername.invalid>
Newsgroups: comp.arch
Subject: Re: Byte Addressability And Beyond
Date: Thu, 02 May 2024 08:58:23 -0600
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On Wed, 1 May 2024 23:17:06 -0000 (UTC), Lawrence D'Oliveiro
<ldo@nz.invalid> wrote:

>On a little-endian architecture, it is always the lowest-significance 
>byte.
>
>But on a big-endian architecture, for a register-memory-register move, it 
>will be the highest-significance byte. But for the memory-register-memory 
>case, it will be the lowest-significance byte.
>
>In other words, even on big-endian architectures, registers are still 
>interpreted as little-endian!
>
>Isn’t that fun?

It had never occured to me to think about it in this way.

To me, it just made sense that, since registers contain quantities, if
you load the value "8" into a reigster, it will contain the number 8.

So in a byte operation, the least significant bits of the register are
used.

While if yiou store something in a memory location, you're only using
the length corresponding to the size of the operand. So, yes, storing
a value into a byte in memory... puts it at the location of the most
significant 8 bits of a 32-bit quantity having the same address.

But so what? Usually, a memory location is used for only one size of
data. If EQUIVALENCE magic is going on, it makes more sense to have
numbers in memory look the way we write them, so it's easy to
understand.

Plus, if you load a single precision float into a floating-point
register, you are loading on the left side, not the right side, so the
inconsistency to which you're referring now impacts the little-endian
machines. (Of course, though, that's no longer quite true with IEEE
754, since the exponent isn't the same size for all precisions, the
way it was with old-fashioned machines.)

John Savard