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Article <jwvjzhibrcf.fsf-monnier+comp.arch@gnu.org>
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From: Stefan Monnier <monnier@iro.umontreal.ca>
Newsgroups: comp.arch
Subject: Non-pipelined FDIV/SQRT (was: Continuations)
Date: Thu, 18 Jul 2024 12:33:13 -0400
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> If the FP multiplier is a 4-stage pipeline, and FDIV is iterating using
> the multiplier, can the pipeline get a mix of multiple operations going
> at once?  FDIV for both Newton–Raphson and Goldschmidt iterates serially
> so each can only use one of the 4 pipeline slots.

Something I've been wondering for a while, indeed.
IOW, is there enough parallelism inside the FDIV/SQRT "microcode" to keep the
FMAC fully busy (my naive understanding is that there isn't)?
If not, do current CPU make the FMAC available for other operations while
an FDIV/SQRT is in progress?  If not, how hard would it be?


        Stefan