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From: John Larkin <jjSNIPlarkin@highNONOlandtechnology.com>
Newsgroups: sci.electronics.design
Subject: Re: spread-spectrum model
Date: Fri, 19 Apr 2024 13:43:59 -0700
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On Fri, 19 Apr 2024 11:08:36 -0700, boB <boB@K7IQ.com> wrote:

>On Fri, 19 Apr 2024 08:22:44 -0700, John Larkin
><jjSNIPlarkin@highNONOlandtechnology.com> wrote:
>
>>On Fri, 19 Apr 2024 10:30:45 -0400, Joe Gwinn <joegwinn@comcast.net>
>>wrote:
>>
>>>On Thu, 18 Apr 2024 12:14:04 -0700, John Larkin
>>><jjSNIPlarkin@highNONOlandtechnology.com> wrote:
>>>
>>>>On Thu, 18 Apr 2024 13:16:04 -0400, Joe Gwinn <joegwinn@comcast.net>
>>>>wrote:
>>>>
>>>>>On Thu, 18 Apr 2024 08:26:56 -0700, John Larkin
>>>>><jjSNIPlarkin@highNONOlandtechnology.com> wrote:
>>>>>
>>>>>>I'm designing a switching power supply module and could reduce EMI by
>>>>>>going spread-spectrum on the switching frequency. The simple one below
>>>>>>reduces things by 20 dB. Probe the SS node and FFT.
>>>>>>
>>>>>>The ss inside switching reg chips is no doubt more sophisticated. In
>>>>>>an FPGA, we could do some sort of pseudo-random thing.
>>>>>>
>>>>>>On a multi-channel power supply, there may be some small advantage to
>>>>>>have a separate spread per channel. That would be easy.
>>>>>
>>>>>I'd check for cross-correlation as well, so no ganging up in systems
>>>>>using multiple channels in some signal path.
>>>>
>>>>When my engineers get too fussy about stuff like that, I remind them
>>>>"it's just a power supply."
>>>
>>>In my world, we have multiple parallel components (like array
>>>sections) in the signal path powered by independent power supplies
>>>that are required to have independent noise, to prevent correlated
>>>gain when these parallel paths are summed, say in a radar beamformer.
>>>
>>>Telling the power-supply folk that it's just a power supply is a good
>>>way to get buried in details.
>>>
>>
>>My intent was to keep it simple and get it done.
>>
>>>
>>>>>Depending on details, the problem could manifest itself as peaks or
>>>>>ripples in the time domain, your beloved homeland.
>>>>>
>>>>>Joe Gwinn
>>>>>
>>>>
>>>>TI has a couple of interesting appnotes
>>>>
>>>><https://www.ti.com/lit/pdf/slyt809>
>>>>
>>>><https://www.ti.com/lit/SLVAF18>
>>>>
>>>>
>>>>Their little TPS54302 type parts have radical looking PWM, but the
>>>>final DC is super clean. Nice trick.
>>>>
>>>><https://www.dropbox.com/scl/fi/8rytjiwp4hmt2ypgk9bk4/DSC06826.JPG?rlkey=4qipduct0ptrhei07ijdxpsca&raw=1>
>>>>
>>>><https://www.dropbox.com/scl/fi/kf2kxbxih6xjbx8uv2o0d/TPS54302_spectrum.JPG?rlkey=rd3diu5nvhasfn7228m8yk665&raw=1>
>>>>
>>>>We may get some EMI from switching rise/fall ringing too, in the
>>>>hundred-MHz ballpark. It would help to de-phase that too.
>>>
>>>TI stuff is widely used in radar, but in the most capable radars the
>>>dithering is provided by bespoke radar firmware, and not left to the
>>>converter chip.  But those chips do work well.
>>>
>>>Joe Gwinn
>>
>>We've decided to use home-made half bridges in the 8-channel
>>programmable power module. The TI and ADI switching regs are just too
>>smart. We'll use the reg chips when we just want a fixed power supply.
>>
>>I was thinking that we could use a DDS architecture to generate the
>>PWM into the switching half-bridges. We could wobble the frequency
>>setting to spread the spectrum.
>>
>>Maybe replace some of the LSBs of the frequency-set register with a
>>pseudorandom pattern, a different one for each power supply channel.
>>Change those LSBs at some rate, 20 KHz or something, to fool an
>>EMI-test spectrum analyzer.
>>
>>A pseudorandom pattern will average to 0.5, which affects the average
>>switcher frequency, but we can deal with that.
>>
>>I suppose I could draw a diagram.
>>
>>We'd like the fine-grain spectra to not overlap, across all 8
>>channels. Fun.
>>
>>Given eight unipolar half-bridges, we'll allow users to use a pair as
>>a full bridge to drive one bipolar load, or three to drive a 3-phase
>>load like a torque motor. In those cases, I think we can still allow
>>each phase to have its own independent spread-spectrum thing. The
>>motors won't care.
>
>
>The STM32F4  that I use in my inverter/charger  has a SS clock option.
>I have not enabled that yet but intend to eventually for lower peaks
>from the PWM outputs driving all the power circuitry.
>
>boB

That's cool. I'm designing a bunch of plugin modules that would all
get a 50 MHz clock from the backplane. Since my PWM frequencies will
be fairly low, we should be able to fuzz up the spectra in the FPGA on
each board.

We could code a generic ss PWM block and use it everywhere.

https://www.dropbox.com/scl/fi/2ypg6qhnalmixv6kx44if/Spread_Spectrum_Apr_19.jpg?rlkey=d3hiwl4mj57erk82629fyouse&raw=1