Path: ...!Xl.tags.giganews.com!local-3.nntp.ord.giganews.com!nntp.earthlink.com!news.earthlink.com.POSTED!not-for-mail
NNTP-Posting-Date: Fri, 10 Jan 2025 07:58:47 +0000
Subject: Re: (Almost) Rock-n-Roll - "The Bunny Hop" (1953)
Newsgroups: comp.os.linux.misc
References: <KJScnT-S8K3a4uL6nZ2dnZfqnPudnZ2d@earthlink.com>
 <slrnvnvso6.fl4.trepidation@vps.jonz.net>
 <ztWcnU7j3cxz9x36nZ2dnZfqnPqdnZ2d@earthlink.com>
 <vlqh76$3sp5m$1@dont-email.me>
From: "186282@ud0s4.net" <186283@ud0s4.net>
Organization: wokiesux
Date: Fri, 10 Jan 2025 02:58:46 -0500
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
 Thunderbird/78.13.0
MIME-Version: 1.0
In-Reply-To: <vlqh76$3sp5m$1@dont-email.me>
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Language: en-US
Content-Transfer-Encoding: 8bit
Message-ID: <s8mdnU91-9aqTh36nZ2dnZfqnPudnZ2d@earthlink.com>
Lines: 38
X-Usenet-Provider: http://www.giganews.com
NNTP-Posting-Host: 99.101.150.97
X-Trace: sv3-OKkoBbbtsA8VcEWFiU/W257vpPNdrA0mhaCegaSwHpnV07nBd1IKbAwqcEQ/JIL84/8PEdLB4zfqDmU!fhA3ashy2qRndfsFj639mXdE9/5PsLih4YDO4fmTq2SkxT4C9o1TV7avtnNNqD11ym7hu6x88SXU!NavGnMZwzPmMlBBZTrlx
X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers
X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly
X-Postfilter: 1.3.40
Bytes: 3014

On 1/10/25 2:11 AM, The Natural Philosopher wrote:
> On 10/01/2025 00:33, 186282@ud0s4.net wrote:
>> I've been trying to find out
>>    if with modern 'flat address space' CPUs there's
>>    any speed advantage in setting functions and
>>    data blocks at specific addresses - what in the
>>    old days would have been 'page boundaries' or
>>    such. In short does an i7 or ARM and/or popular
>>    mem-management chips have less work to do setting
>>    up reading/writing at some memory addresses ?
>>    Maybe a critical app could run ten percent faster
>>    if, even 'wasting' memory, you put some stuff in
>>    kind of exact places. Older chips with banked
>>    memory and even mag HDDs, the answer was Yes.
> 
> Mm.
> 
> I don't think so. About the only thing that is proximity sensitive is 
> cacheing. That is you want to try and ensure that you are operating out 
> of cache, but the algorithms for what part of the instructions are 
> cached and what are not is beyond my ability to identify, let alone code 
> in...

   I did a lot of searching but never found a
   good answer. IF you can do stuff entirely
   within CPU cache then it WILL be faster.
   Alas not MUCH stuff will be adaptable to
   that strategy - esp with today's bloatware.

   We MAY be talking maker/sub-brand specifics ...
   intel i3/i5/i7/i9 may all be different. Different
   gens different yet. ARMs too.

   Seems that CPUs and MMUs can do certain register
   ops faster/easier than others - fewer calx and
   switching settings. Therein my quest. If you want
   some code to run AS FAST AS POSSIBLE it's worth
   thinking about.