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From: Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net>
Newsgroups: sci.electronics.design
Subject: Re: +48 precharge
Date: Sun, 24 Mar 2024 20:58:22 -0000 (UTC)
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Joe Gwinn <joegwinn@comcast.net> wrote:
> On Sun, 24 Mar 2024 12:14:57 -0700, John Larkin
> <jjlarkin@highlandtechnology.com> wrote:
> 
>> 
>> We have a board that tends to blow up.
>> 
>> It has a couple of isolated dc/dc converters, gate driver chips and
>> big mosfet full-bridges driving transformers. The gate drivers get
>> their inputs from an FPGA.
>> 
>> The probelm is that the +48 volts to the h-bridges comes up at power
>> turn-on, but the FPGA is configured some minutes later, after Linux
>> boots up. And I don't entirely trust the FPGA outputs meanwhile.
>> Possibly never.
>> 
>> After designing many complex fixes, a simple fix is to precharge the
>> module's +48 rail gently, and slam it on hard after everything is
>> verified stable.
>> 
>> 
>> <https://www.dropbox.com/scl/fi/i7mgvnad9h1itxf8p0t76/P941_942_Precharge_1.jpg?rlkey=tv3rh3kzlw40th20oes6hlhr2&raw=1>
>> 
>> 
>> The one-shot gets its I'M OK trigger from the FPGA, which can only
>> happen if the FPGA is working, I hope.
> 
> Can you require significant net charge transfer on a short period of
> time from the FPGA before the one-shot will trigger?
> 
> Joe Gwinn
> 

There are any number of ways to reject FPGA zombie behavior. The
retriggerable one-shot is pretty simple. 

Another fairly simple one would be making the processor wait to receive a
specific message from the FPGA, e.g. “Tranquility Base here. The Eagle has
landed.”

Cheers 

Phil Hobbs 

-- 
Dr Philip C D Hobbs  Principal Consultant  ElectroOptical Innovations LLC /
Hobbs ElectroOptics  Optics, Electro-optics, Photonics, Analog Electronics