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From: Don Y <blockedofcourse@foo.invalid>
Newsgroups: sci.electronics.design
Subject: Re: Zilog stopping Z80 production
Date: Wed, 24 Apr 2024 23:44:14 -0700
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On 4/24/2024 10:27 PM, boB wrote:
> On Wed, 24 Apr 2024 16:09:33 -0700, Don Y
> <blockedofcourse@foo.invalid> wrote:
> 
>> On 4/24/2024 1:42 PM, boB wrote:
>>> On Tue, 23 Apr 2024 18:44:24 -0700, Don Y
>>> <blockedofcourse@foo.invalid> wrote:
>>>
>>>> On 4/23/2024 2:40 PM, boB wrote:
>>>>> I miss playing with my old home built S-100 CP/M computer around 1980.
>>>>> Those were really the fun days of computing and digital logic
>>>>> circuits.
>>>>
>>>> Nowadays, the Zx80's appeal would be in controlling things.
>>>> There's little that you can't now do *better* that you would
>>>> previously have used a CP/M box for.
>>>>
>>>>> The other day after hearing the demise of the Z80, I ordered 2 of the
>>>>> 20 MHz Z80  40 pin devices.  I did not even know there was a 20 MHz
>>>>> version.  Not sure what I will ever do with them but who knows ?
>>>>> Maybe I'll just look at them.
>>>>
>>>> Again, in the context of "control" (i.e., deeply embedded),
>>>> you would likely also need similar speed grade peripherals
>>>> to do anything.
>>>
>>> Yes, I know.  Address decoders are a dime a dozen (almost) and any
>>> other peripherals can either be made  or, I may actually have the
>>> others laying around.  I save old ICs and have since the 1970s.
>>
>> But those devices won't be of the same (fast) speed grade as the
>> processor.  Remember, all "external (to the CPU) interactions"
>> happen at a rate defined by the system clock frequency.  So, the
>> RETI daisy chain will have to operate "faster", the devices
>> will have to put data onto the bus -- and take it off -- quicker,
>> all rate generators (dividers) will have to be rejiggered for a
>> faster input clock, any software delay loops (explicit or implied)
>> will have to be rewired, etc.
> 
> The interface isn't that complicated with parts that are available
> today to build something.  OR I could just run the part at 4MHz.

Running a 20MHz part at 1980 speeds seems kinda silly...

Also, note that the Z80 peripherals weren't as trivial as,
e.g., generic devices (like a 6402 vs. a DART/SIO).  They
were designed to understand the specific details of the Z80's
bus timing whereas generic devices didn't have such logic.

(For example, the roles of IEI & IEO and the monitoring of the
bus for the RETI opcode to "adjust" the interrupt priority
resolution logic).

>>>> I had a particular fondness for the '180 (and '7180!) as it
>>>> wasn't crippled by the tiny address space (64K memory + 64K I/O)
>>>> of the Z80.  Over the years, I've come to realize that you usually
>>>> need more space for *code* than data!
> 
> I am not THAT interested in using an obsolete part. Just wanted one. I
> may never even use it.

After a while, all of those "collectibles" just start to look like
dust collectors!  :>  But, they're still hard to part with...
(all of those white ceramic packages with gold foil traces on top!)

What time teaches is that most of the "significant projects" done
in ASM on these early processors are ORDERS of magnitude less
"complicated" when a modern HLL (and other programming tools) is
used.

E.g., I spent a few months building a LORAN-C autopilot (trivial
hardware) and suspect I could do the same thing in a *weekend*,
nowadays (I'd layout a PCB and have the board fabbed instead of
wire-wrapping it on perfboard, and building an appropriate power
supply; the main functionality would take less than a page of
code -- a bit more to add the display logic, etc.)

[Why write a floating point math package when I can just write a
few expressions in *infix* notation?!]