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From: Lawrence D'Oliveiro <ldo@nz.invalid>
Newsgroups: comp.arch
Subject: Re: Byte Addressability And Beyond
Date: Wed, 1 May 2024 20:38:58 -0000 (UTC)
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On Wed, 1 May 2024 16:38:09 +0000, MitchAlsup1 wrote:

> Lawrence D'Oliveiro wrote:
> 
>> You still need a place to put a bit offset for the base address of the
>> field. Why not put it together with the rest of the address?
> 
> Given a 20-40 year life of an architecture and the desire not to be
> limited by addressability; I wanted and demanded of myself a full 63-bit
> virtual address space per thread. Therefore, no bits in the pointer are
> available for bit level addressing.

You will just have to make the move to 128-bit addressing, then. Some 
designers (e.g. RISC-V) are already putting in place plans for that.

>> The way I think of it is: consider how you specify these 3 conventions:
>> * numbering of bits within a byte
>> * numbering of bytes within a multibyte quantity
>> * the place values of bits in an integer
> 
>> The only way to get all 3 consistent is with a little-endian
>> architecture. Every big-endian architecture has inconsistencies between
>> these somewhere or another.
> 
> Very many LE machines got one or more of those wrong, too.

For example?