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From: John Levine <johnl@taugh.com>
Newsgroups: comp.arch
Subject: Re: Byte Addressability And Beyond
Date: Fri, 3 May 2024 18:42:29 -0000 (UTC)
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>> Lawrence D'Oliveiro wrote:
>> 
>>>     move.l a, b
>>>     move.b b, c

This is the same mistake that Brooks and Blaauw made, so invested in
your familiar byte order that you imagine that normal differences of
the other are somehow wrong.

Here's a concrete example on S/360.

   L    R,100
   STH  R,200

That does a four byte load of location 100 into a register, and then
a two byte halfword store into 200.  The load gets bytes 100 through 103
with 100 going into the high byte of the register.  The store puts its
values into bytes 200 and 201.  Since it's the low half of the register,
the new contents of 200 and 201 are the old contents of 102 and 103.

Before anyone says aha, that's surprising or wrong. no it's not. It's
the way big-endian addressing works, and it would be surprising and
wrong if it did anything else. If we wanted to put the contents of 100
and 101 into 200 and 201, we'd have done something else, maybe this on
S/370 and later to explicitly store the high two bytes of the word:

   L    R,100
   STCM R,12,200

or just move the two bytes directly

   MVC 200(2),100

I have written assembler code for S/360, PDP-11, Vax, ROMP, 8086/286
and more machines using both byte orders than I can remember, so I'm
speaking from experience here, not guessing.

-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly