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From: "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com>
Newsgroups: comp.arch
Subject: Re: Address space limits
Date: Sat, 4 May 2024 20:25:14 -0700
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On 5/4/2024 5:12 PM, MitchAlsup1 wrote:
> Chris M. Thomasson wrote:
> 
>> On 5/4/2024 3:18 AM, Thomas Koenig wrote:
>>> Lawrence D'Oliveiro <ldo@nz.invalid> schrieb:
>>>
>>>> Intel pushed this thing called the “x32” ABI into the Linux kernel
> (and
>>>> possibly some other places) some years ago. This was using the AMD64
>>>> instruction set, but with only 32-bit pointers. This way, you got the
>>>> benefit of the extra registers, without the overhead of the longer
>>>> addresses.
>>>
>>> That was Donald Knuth's idea.
> 
>> Storing meta data in actual pointers, aka aligned on a larger 
>> boundary, is critical to many advanced lock/wait free algorithms as 
>> well. I remember storing an actual reference count in pointers before 
>> for a special type of counting.
> 
> Even if one has multi-location ATOMICs ?? (as a single event ??)

This was a technique for storing data in a pointer. For instance, strong 
atomic reference counting we need to update a pointer _and_ a reference 
together atomically. This can easily be done with DWCAS, or double width 
compare and swap. So, on a 32 bit system we need 64 bit cas, for a 64 
bit system we need 128 bit cas. However, sometimes we can pack the 
reference count in the pointer value itself if its aligned on a big 
enough boundary. Then we can update the pointer and the reference count 
using normal word based atomic RMW's.