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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Lawrence D'Oliveiro <ldo@nz.invalid> Newsgroups: comp.arch Subject: Re: Byte Addressability And Beyond Date: Tue, 7 May 2024 06:40:23 -0000 (UTC) Organization: A noiseless patient Spider Lines: 15 Message-ID: <v1cicn$33u73$2@dont-email.me> References: <v0s17o$2okf4$2@dont-email.me> <v11u92$cghm$1@dont-email.me> <v13b6l$2uft$1@gal.iecc.com> <v16jem$1fjrg$2@dont-email.me> <v16nlj$1b66$1@gal.iecc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Injection-Date: Tue, 07 May 2024 08:40:23 +0200 (CEST) Injection-Info: dont-email.me; posting-host="30173f80060481ed31259743c2a7c1a1"; logging-data="3274979"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18jALb9u5zmqdOOQquc4Cuj" User-Agent: Pan/0.155 (Kherson; fc5a80b8) Cancel-Lock: sha1:5lLBINQXVY6Jf29U05bjxTzwSqE= Bytes: 1628 On Sun, 5 May 2024 01:33:39 -0000 (UTC), John Levine wrote: > According to Lawrence D'Oliveiro <ldo@nz.invalid>: > >> So using the same register name to address a halfword gives you the low >> half of the register, not the high half? >> >> Whereas using the same memory address to address a halfword gives you >> the high half of the word at that location, not the low half? > > ... correct. So you are backing up what I’m claiming, that in accessing parts of registers, big-endian architectures behave just like little-endian ones? How exactly is that supposed to prove me wrong?