Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: Thomas Koenig <tkoenig@netcologne.de>
Newsgroups: comp.arch
Subject: Re: Oops (Concertina II Going Around in Circles)
Date: Sat, 11 May 2024 07:22:49 -0000 (UTC)
Organization: A noiseless patient Spider
Lines: 24
Message-ID: <v1n6c9$1tmli$1@dont-email.me>
References: <ofeq3j9ni63e7tmccf2qbkb9t0naui44ei@4ax.com>
 <memo.20240510001905.16164S@jgd.cix.co.uk>
 <be3r3jhr1kf9n1cdsbik5ejsuso7c3pmmk@4ax.com>
 <d91bcb3fa686c0c4e775d5af6115f64b@www.novabbs.org>
 <570t3jd9g2ik3v491n8poftrfvo0l50jdh@4ax.com>
Injection-Date: Sat, 11 May 2024 09:22:50 +0200 (CEST)
Injection-Info: dont-email.me; posting-host="055b931f463d65091be79d626713fc70";
	logging-data="2022066"; mail-complaints-to="abuse@eternal-september.org";	posting-account="U2FsdGVkX1/JmnhHOb2DhiK1r4RygMDnydunAnXm/Sk="
User-Agent: slrn/1.0.3 (Linux)
Cancel-Lock: sha1:vOJ6dQ8tQGyItu2p25C10AR/PJA=
Bytes: 2071

John Savard <quadibloc@servername.invalid> schrieb:
> On Fri, 10 May 2024 17:27:10 +0000, mitchalsup@aol.com (MitchAlsup1)
> wrote:
>
>>Or skip to the end and only invent AVX while skipping the soon-to-be
>>redundant intermediate stages.
>
> Well, I went to 256-bit short vectors as a permanent part of the
> architecture, with long vectors as the next step.
>
> But what about crypto assist instructions, as another example?

You will probably want to look at AES for this.  AES operates on
16-byte blocks, so having 128-bit registers is natural.

AES256 also needs 15 separate keys, which should be kept in
registers if you are doing things on a CPU, so because you
also need intermedite results and also to load/store data, 
so 32 128-bit registers would be a good fit.  Look at POWER's
vcipher and vcipherlast as an example.

These register would also be a good fit for 128-bit IEEE floating
point, which only POWER at the moment supports in hardware, plus
those SIMD things that do not come in loops (aka SLP).