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From: Lawrence D'Oliveiro <ldo@nz.invalid>
Newsgroups: comp.arch
Subject: Re: architectural goals, Byte Addressability And Beyond
Date: Tue, 4 Jun 2024 01:21:56 -0000 (UTC)
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On Thu, 30 May 2024 13:41:58 -0000 (UTC), Thomas Koenig wrote:

> Anton Ertl <anton@mips.complang.tuwien.ac.at> schrieb:
> 
>> The fact that these feature provide no actual benefit is their best
>> property:
> 
> No actual benefit?
> 
> If you make such a strong statement, I assume that you have done a
> thorough analysis of this feature for typical mainframe workloads and
> can support your claims with benchmarks.

We already know the answer to that. It’s why RISC has taken over the 
computing world.

Remember that “mainframe workloads” are primarily I/O bound, not CPU-
bound. The whole concept of a “mainframe” arose in the era when CPU time 
was scarce and expensive, so you had all these intelligent I/O peripherals 
that could be given sequences of operations to perform, with minimal CPU 
intervention. It was all about maximizing throughput (batch operation), 
not minimizing latency (interactive operation).

Nowadays, the whole concept is obsolete. So the only thing keeping it a 
viable business has to be marketing, not technical, reasons.