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From: Terje Mathisen <terje.mathisen@tmsw.no>
Newsgroups: comp.arch
Subject: Re: Byte Addressability And Beyond
Date: Tue, 4 Jun 2024 10:54:27 +0200
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Michael S wrote:
> On Mon, 3 Jun 2024 08:03:53 -0000 (UTC)
> Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
>=20
>> On Thu, 30 May 2024 18:31:46 +0000, MitchAlsup1 wrote:
>>
>>> 30 years ago you could say the same thing about encryption.
>>
>> I don=C3=A2=E2=82=AC=E2=84=A2t think newer CPUs have been optimized fo=
r encryption. Instead,
>> we see newer encryption algorithms (or ways of using them) that work
>> better on current CPUs.
>=20
> I think moderate efficiency on CPU, not too low, but not high either,
> is a requirement for (symmetric-key) cipher. Esp. when the key is
> 128-bit or shorter.

That's correct:

CPU efficiency, primarily on the reference 32-bit platform (PentiumPro=20
200 MHz) but also on an 8-bit "smart card" implementation was one of the =

key requirements for the AES competition.

When a group of four programmers (including me) spent a week on CERN's=20
candidate, we were able to triple the speed, bringing it into parity=20
with the eventual winner. All the finalists were more or less the same=20
speed at this point, i.e. able to do full duplex 100 Mbit/s Ethernet=20
traffic (so around 20 MB/s) on a single thread/core.

Terje

--=20
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"