Deutsch English Français Italiano |
<v8pn2b$gtqm$1@dont-email.me> View for Bookmarking (what is this?) Look up another Usenet article |
Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: "Stephen Fuld" <SFuld@alumni.cmu.edu.invalid> Newsgroups: comp.arch Subject: Re: Arguments for a sane ISA 6-years later Date: Mon, 5 Aug 2024 05:13:47 -0000 (UTC) Organization: A noiseless patient Spider Lines: 60 Message-ID: <v8pn2b$gtqm$1@dont-email.me> References: <b5d4a172469485e9799de44f5f120c73@www.novabbs.org> <2024Jul26.190007@mips.complang.tuwien.ac.at> <v811ub$309dk$1@dont-email.me> <2024Jul29.145933@mips.complang.tuwien.ac.at> <v88gru$ij11$1@dont-email.me> <2024Jul30.114424@mips.complang.tuwien.ac.at> <v8bi3e$16ahe$1@dont-email.me> <2024Aug1.191028@mips.complang.tuwien.ac.at> <gLPqO.1578$vu%c.859@fx08.iad> <55b647d46e79c54dc1261bbd037db3ac@www.novabbs.org> <ojSqO.21621$a6n5.10286@fx15.iad> <12d7fbb12f475a46ebce3e22fa4920ad@www.novabbs.org> <FI5rO.3432$1w_2.3356@fx48.iad> <2667d4e23b45172d4d618fbc6fd4cee8@www.novabbs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Injection-Date: Mon, 05 Aug 2024 07:13:48 +0200 (CEST) Injection-Info: dont-email.me; posting-host="784e1d03d906db04ada858b210b93b98"; logging-data="554838"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19KbD0YrmF8a8VhTut+flr3UnrFSRe7+jk=" User-Agent: XanaNews/1.21-f3fb89f (x86; Portable ISpell) Cancel-Lock: sha1:IPIkoK7QZbg5bUnu54TwMwHblak= Bytes: 3734 MitchAlsup1 wrote: > On Fri, 2 Aug 2024 14:05:25 +0000, Scott Lurndal wrote: > > > mitchalsup@aol.com (MitchAlsup1) writes: > > > On Thu, 1 Aug 2024 20:34:28 +0000, Scott Lurndal wrote: > > > > > > > > > > > > In addition, ARM64 CPUs include allocation hints in > > > > > > the memory type such as 'read allocate', 'transient read > > > > > > allocate', 'write allocate' as well has having optionally > > > > > > multiple coherency domains (inner and outer sharable). > > > > > > > > > > Sorry, I don't understand the word 'allocate' ?!? > > > > > > > > "allocate a cache line". > > > > > > > > Example would be a DMA request with the 'read allocate' hint > > > > is allowed to be allocated in LLC instead of being stored in > > > > DRAM. > > > > > > > > Used when software expects the DMA data to be immediately. > > > > > > Thanks for the explanation. > > > > > > In my case LLC is simply the front end for DRAM so a device > > > write will spew data into LLC where it will wait to be written. > > > > I'm not sure that's a good idea. Large DMAs are common > > (e.g. reading pages of data in a single I/O) and the data > > from the DMA is not always used by the CPU. Evicting LLC lines to > > accomodate a file copy, for example, seems less than optimal. > > Fair enough. But after thinking abut this for a while, does the > process performing the file copy even know it is doing a file > copy ?? for example:: > > cat ../mydir/myfile > ../yourdir/yourfile > > Which kind of applications know they are doing Input that will > not be used rather presently ?? > > It seems to me that a file copy application would understand > that writing of DRAM is irrelevant when the true destination > is another sector on another disk, and any means to connect > those does is more than sufficient. I suppose you could creaate a mecnahism that fed the data from the "read" DMA directly to the "Write DMA, thus bypassing not only the cache, but the saving DRAM bandwidth as well. This would help on copies, and perhaps things like defrag and backup. But I suspect that the savings are not worth the effort. -- - Stephen Fuld (e-mail address disguised to prevent spam)