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From: olcott <polcott333@gmail.com>
Newsgroups: comp.theory
Subject: Re: HHH maps its input to the behavior specified by it --- reaches
 its halt state --- Which DDD does if HHH(DDD) returns and answer, which it
 does since it is a decider.
Date: Fri, 9 Aug 2024 21:43:55 -0500
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On 8/9/2024 9:35 PM, Richard Damon wrote:
> On 8/9/24 10:24 PM, olcott wrote:
>> On 8/9/2024 8:54 PM, Richard Damon wrote:
>>> On 8/9/24 9:52 PM, olcott wrote:
>>>> On 8/9/2024 8:46 PM, Richard Damon wrote:
>>>>> On 8/9/24 9:25 PM, olcott wrote:
>>>>>> On 8/9/2024 8:05 PM, Richard Damon wrote:
>>>>>>> On 8/9/24 8:52 PM, olcott wrote:
>>>>>>>>
>>>>>>>> When we look at every HHH that can possibly exist then
>>>>>>>> we see that DDD correctly emulated by each one of these
>>>>>>>> cannot possibly reach its "return" instruction halt state.
>>>>>>>
>>>>>>> But ONLY ONE of those actuallu "correctly emulates" the input, 
>>>>>>> and that one isn't a decider.
>>>>>>>
>>>>>>
>>>>>> In other words you are trying to keep getting away
>>>>>> with the bald-faced lie that when HHH correctly
>>>>>> emulates N instructions of DDD (where N > 0) that
>>>>>> it did not correctly emulate any instructions of DDD.
>>>>>>
>>>>>> *Give it up you lost you are stuck in repeat mode*
>>>>>> *Give it up you lost you are stuck in repeat mode*
>>>>>> *Give it up you lost you are stuck in repeat mode*
>>>>>>
>>>>>
>>>>> So, I guess you don't understand English.
>>>>>
>>>>> Where did I say that simulating N instructions correctly is not 
>>>>> simulating ANY instructions correctly.
>>>>>
>>>>
>>>> *Shown above*
>>>> "But ONLY ONE of those actuallu "correctly emulates" the input..."
>>>>
>>>
>>> Right, becuase to correctly emulate, you need to correct emulate 
>>> EVERY instruction, not just some of them.
>>>
>>
>> So you defining whole notion simulating termination analyzers
>> as incorrect even though professor Sipser has agreed that the
>> simulation need not be complete.
> 
> No, they just need to do the job right.
> 
> But it needs to prove that the CORRECT SIMULATION, which would be 
> complete, doesn't ever reach a final state. T

void DDD()
{
   HHH(DDD);
   return;
}

You already know that a complete simulation of DDD
by a pure x86 emulator cannot possibly reach its
"return" instruction halt state.

What makes an algorithm necessarily much more ignorant
than you?

It only needs to correctly predict the behavior of
the complete simulation. Just like you and I, it
does not have to do this complete simulation to make
this correct prediction.

-- 
Copyright 2024 Olcott "Talent hits a target no one else can hit; Genius
hits a target no one else can see." Arthur Schopenhauer