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From: John Levine <johnl@taugh.com>
Newsgroups: comp.arch
Subject: Re: Instruction Tracing
Date: Sun, 11 Aug 2024 01:57:10 -0000 (UTC)
Organization: Taughannock Networks
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References: <v970s3$flpo$1@dont-email.me> <2024Aug10.121802@mips.complang.tuwien.ac.at>
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It appears that Lawrence D'Oliveiro  <ldo@nz.invalid> said:
>(ROMP was also one of those RISC architectures that had delayed branches,
>along with MIPS, HP-PA and I think SPARC as well.)
>
>I have heard it said that the RT PC was a poor advertisement for the
>benefits of RISC, and the joke was made that “RT” stood for “Reduced
>Technology”.

I worked on AIX for the RT/PC. It was a pretty reasonable chip for the
time, but it suffered greatly from internal IBM political fights which
made it too little too late. AIX ran on top of a bloated virtual
machine which made the whole thing too slow. There was skunkworks port
of BSD that was supposed to be a lot better.

As far as the delayed branches and such, they made sense in the narrow
time window when it was too expensive to put a cache on a workstation
but that time came and went by the time the RT shipped.
-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly