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Path: ...!3.eu.feeder.erje.net!feeder.erje.net!weretis.net!feeder8.news.weretis.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Lawrence D'Oliveiro <ldo@nz.invalid> Newsgroups: comp.arch Subject: Decrement And Branch Date: Tue, 13 Aug 2024 09:00:25 -0000 (UTC) Organization: A noiseless patient Spider Lines: 20 Message-ID: <v9f7b9$3qj3c$1@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Injection-Date: Tue, 13 Aug 2024 11:00:26 +0200 (CEST) Injection-Info: dont-email.me; posting-host="dcc5997f875115997406f45b29a1ceee"; logging-data="4017260"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX185e/wY3YL9XhuFKtwsM8CM" User-Agent: Pan/0.159 (Vovchansk; ) Cancel-Lock: sha1:zE+q4f8j9uxaefUZTlONIZdZCsk= Bytes: 2084 I thought loop-control instructions had fallen out of favour in the RISC era. But reading some IBM POWER (and PowerPC) docs has reminded me that that family does have such instructions. I don’t think any other RISC architecture does, though. POWER even has a special register (CTR, the “counter” register) for use with loop instructions, though it could also (along with LR, the “link” register) be used for indirect branches. (Obviously you need at least two registers with this property.) The original designers of POWER clearly thought there was a point to having such instructions; do you agree? The most common form of these will decrement the counter register, and only branch back to the top of the loop if the counter has not reached zero; if it is now zero, then fall through. However, the good old VAX (in its usual kitchen-sink fashion) had a whole set of variations, including one that decremented down to -1 instead of zero. And the Motorola 68000 family only had the decrement down to -1 version. This seemed to mystify quite a few assembly-language programmers. I wonder why it wasn’t a more popular idea ...