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From: Lawrence D'Oliveiro <ldo@nz.invalid>
Newsgroups: comp.arch
Subject: Re: is Vax adressing sane today
Date: Fri, 6 Sep 2024 07:08:51 -0000 (UTC)
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On Fri, 06 Sep 2024 06:05:35 GMT, Anton Ertl wrote:

> ... they failed to stick to VAX for the few more years until
> they would have developed an OoO implementation, which would have
> leveled the playing field again (see Pentium Pro).

It takes a whole lot of extra transistors (and consequent die area) to 
keep a CISC architecture comparable in performance to RISC. Back about 
when Intel finally caught up with PowerPC, I remember their chip packages 
were huge -- about the size of a VHS videocassette.

Intel were probably spending 10× what Apple-IBM-Motorola were putting into 
each generation of chip development. But then, the x86 world had 10× the 
revenue coming in, so Intel could afford it. That’s how they regained the 
lead over RISC.

Nowadays, I don’t think the revenue advantage is quite what it once was. 
That, and the even greater increases in chip complexity (and hence 
development cost), has tilted the playing field more in favour of RISC 
architectures, notably ARM and RISC-V.