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From: Brett <ggtgp@yahoo.com>
Newsgroups: comp.arch
Subject: Heads and Tails flaws
Date: Fri, 6 Sep 2024 23:49:27 -0000 (UTC)
Organization: A noiseless patient Spider
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Brett <ggtgp@yahoo.com> wrote:
> Anton Ertl <anton@mips.complang.tuwien.ac.at> wrote:

Here is a PDF on heads and tails:

http://scale.eecs.berkeley.edu/papers/hat-cases2001.pdf

They went for maximum density, which is stupid. The timing critical part is
the source registers, and in a wide implementation the dest registers are
also critical. Opcodes and data/offsets only matter far later in the
pipeline.

I would do three registers and enough opcode bits to get an idea of opcode
type and size. For one and two register instructions you pack in more
opcode.