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From: Lawrence D'Oliveiro <ldo@nz.invalid>
Newsgroups: comp.arch
Subject: Re: is Vax addressing sane today
Date: Mon, 9 Sep 2024 06:21:08 -0000 (UTC)
Organization: A noiseless patient Spider
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On Mon, 9 Sep 2024 04:38:42 -0000 (UTC), Brett wrote:

> Thomas Koenig <tkoenig@netcologne.de> wrote:
>
>> The early RISC designs aimed for one instruction per cycle, achieved
>> maybe 0.7.
> 
> The next step up for a CPU has one ALU and one load/store unit, giving
> above one IPC. This is what one of the PlayStation CPU’s did.

Those were the ones using PowerPC chips in the 1990s, I think it was. 
IBM’s POWER claimed superscalar performance right from its launch in, what 
was it, 1989.