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From: jseigh <jseigh_es00@xemaps.com>
Newsgroups: comp.arch
Subject: Re: Is Intel exceptionally unsuccessful as an architecture designer?
Date: Sun, 22 Sep 2024 07:44:43 -0400
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On 9/21/24 18:49, jseigh wrote:
> 
> Well, we have asymmetric memory barriers now (membarrier() in linux)
> so we can get rid of memory barriers in some cases.  For hazard
> pointers which used to be a (load, store, mb, load) are now just
> a (load, store, load).  Much faster,  from 8.02 nsecs to 0.79 nsecs.
> So much so that other things which has heretofore been considered
> to add negligible overhead are not so much by comparison.  Which can
> be a little annoying because some like using those a lot.
> 

I should correct those timings slightly.  The measurements were for a
hazard pointer load, a dummy dependent load, and a hazard pointer clear.
If I measure w/o the dummy dependent load, the timings go from
7.75 to 0.61 nsecs respectively.

Joe Seigh