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From: "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com>
Newsgroups: comp.arch
Subject: Re: Is Intel exceptionally unsuccessful as an architecture designer?
Date: Mon, 23 Sep 2024 14:35:53 -0700
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On 9/23/2024 1:59 PM, MitchAlsup1 wrote:
> On Mon, 23 Sep 2024 7:53:36 +0000, Michael S wrote:
> 
>> On Mon, 23 Sep 2024 01:34:55 +0000
>> mitchalsup@aol.com (MitchAlsup1) wrote:
>>
>>> On Mon, 23 Sep 2024 0:53:35 +0000, jseigh wrote:
>>>
>>>> On 9/22/2024 5:39 PM, MitchAlsup1 wrote:
>>>
>>>> Speaking of memory models, remember when x86 didn't have
>>>> a formal memory model.  They didn't put one in until
>>>> after itanium.  Before that it was a sort of processor
>>>> consistency type 2 which was a real impedance mismatch
>>>> with what most concurrent software used a a memory model.
>>>
>>> When only 1 x86 would fit on a die, it really did not mater
>>> much. I was at AMD when they were designing their memory
>>> model.
>>>
>>>> Joe Seigh
>>
>>
>> Why # of CPU cores on die is of particular importance?
> 
> Prior to multi-CPUs on a die; 99% of all x86 systems were
> mono-CPU systems, and the necessity of having a well known
> memory model was more vague. Although there were servers
> with multiple CPUs in them they represented "an afternoon
> in the FAB" compared to the PC oriented x86s.
> 
> That is "we did not see the problem until it hit us in
> the face." Once it did, we understood what we had to do:
> presto memory model.
> 
> Also note: this was just after the execution pipeline went
> Great Big Our of Order, and thus made the lack of order
> problems much more visible to applications. {Pentium Pro}

Iirc, been a while, I think there was a problem on one of the Pentiums, 
might be the pro, where it had an issue with releasing a spinlock with a 
normal store. I am most likely misremembering, but it is sparking some 
strange memories. Way back on c.p.t, Alex Terekhov (hope I did not 
butcher the spelling of his name), anyway, wrote about it, I think... 
Way back. early 2000's I think.


> 
>> According to my understanding, what matters is # of CPU cores with
>> coherent access to the same memory+IO.
>> For x86, 4 cores (CPUs) were relatively common since 1996. There
>> existed few odd 8-core systems too, still back in the last century.