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From: Terje Mathisen <terje.mathisen@tmsw.no>
Newsgroups: comp.arch
Subject: Re: Is Intel exceptionally unsuccessful as an architecture designer?
Date: Tue, 24 Sep 2024 07:50:36 +0200
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MitchAlsup1 wrote:
> On Mon, 23 Sep 2024 7:53:36 +0000, Michael S wrote:
>=20
>> On Mon, 23 Sep 2024 01:34:55 +0000
>> mitchalsup@aol.com (MitchAlsup1) wrote:
>>
>>> On Mon, 23 Sep 2024 0:53:35 +0000, jseigh wrote:
>>>
>>>> On 9/22/2024 5:39 PM, MitchAlsup1 wrote:
>>>
>>>> Speaking of memory models, remember when x86 didn't have
>>>> a formal memory model.=C2=A0 They didn't put one in until
>>>> after itanium.=C2=A0 Before that it was a sort of processor
>>>> consistency type 2 which was a real impedance mismatch
>>>> with what most concurrent software used a a memory model.
>>>
>>> When only 1 x86 would fit on a die, it really did not mater
>>> much. I was at AMD when they were designing their memory
>>> model.
>>>
>>>> Joe Seigh
>>
>>
>> Why # of CPU cores on die is of particular importance?
>=20
> Prior to multi-CPUs on a die; 99% of all x86 systems were
> mono-CPU systems, and the necessity of having a well known
> memory model was more vague. Although there were servers
> with multiple CPUs in them they represented "an afternoon
> in the FAB" compared to the PC oriented x86s.

When I started writing my first multi-threaded programs, I insisted on=20
getting a workstation with at least two sockets/cpus:

Somebody wiser than me had written something like "You cannot=20
write/test/debug multithreaded programs without the ability for multiple =

threads to actually run at the same time."

Pretty obvious really, but the quote was sufficient to get my boss to=20
sign off on a much more expensive PC model. :-)

Terje

--=20
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"