Warning: mysqli::__construct(): (HY000/1203): User howardkn already has more than 'max_user_connections' active connections in D:\Inetpub\vhosts\howardknight.net\al.howardknight.net\includes\artfuncs.php on line 21
Failed to connect to MySQL: (1203) User howardkn already has more than 'max_user_connections' active connections
Warning: mysqli::query(): Couldn't fetch mysqli in D:\Inetpub\vhosts\howardknight.net\al.howardknight.net\index.php on line 66
Article <vdm30r$3nrof$1@dont-email.me>
Deutsch   English   Français   Italiano  
<vdm30r$3nrof$1@dont-email.me>

View for Bookmarking (what is this?)
Look up another Usenet article

Path: ...!news.mixmin.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: David Brown <david.brown@hesbynett.no>
Newsgroups: comp.arch
Subject: Re: Byte ordering (was: Whether something is RISC or not)
Date: Thu, 3 Oct 2024 14:34:35 +0200
Organization: A noiseless patient Spider
Lines: 63
Message-ID: <vdm30r$3nrof$1@dont-email.me>
References: <uigus7$1pteb$1@dont-email.me>
 <2024Jan11.080258@mips.complang.tuwien.ac.at>
 <hFeoN.153631$c3Ea.77560@fx10.iad>
 <ae65920bbb2ea09c74d0ea7584604b0f@www.novabbs.com>
 <sEWoN.224880$xHn7.139333@fx14.iad> <uvkh3q$ihej$2@dont-email.me>
 <uvl5hj$q0so$1@dont-email.me>
 <550600971b1a36b4b630c496cb21b96b@www.novabbs.org>
 <vdhkcs$2s651$1@dont-email.me>
 <0194054dac788f7e3a163726e84d72ac@www.novabbs.org>
 <vdi152$2u3v4$1@dont-email.me> <vdkolv$3ed1r$3@dont-email.me>
 <vdlgl9$3kq50$2@dont-email.me> <2024Oct3.113903@mips.complang.tuwien.ac.at>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Thu, 03 Oct 2024 14:34:35 +0200 (CEST)
Injection-Info: dont-email.me; posting-host="27a502e10679e0189ed5bf2ed5c74670";
	logging-data="3927823"; mail-complaints-to="abuse@eternal-september.org";	posting-account="U2FsdGVkX1/gzOdwgZMQDoBuLCN1h9u3syCIsF4ExtI="
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101
 Thunderbird/102.11.0
Cancel-Lock: sha1:o/LpOvGBwLENz6+KmztD8mswwAo=
In-Reply-To: <2024Oct3.113903@mips.complang.tuwien.ac.at>
Content-Language: en-GB
Bytes: 5013

On 03/10/2024 11:39, Anton Ertl wrote:
> David Brown <david.brown@hesbynett.no> writes:
>> Since you mentioned POWER and PowerPC elsewhere, the bit numbering
>> challenges of the m68k world are nothing compared to the PowerPC world.
>> Originally, the PowerPC was 32-bit and numbered bits from 0 as the MSB
>> down to 31 as the LSB.  So your 32-bit address bus had lines from A0
>> down to A31.  Then it got extended to 64-bit (some devices had only
>> partial 64-bit extensions), and the chips got a wider address bus (you
>> never need all 64-bit lines physically) - the pins for the higher
>> address lines were numbered A-1, A-2, and so on.  For the internal
>> registers, some are 64-bit numbered bit 0 (MSB) down to bit 63.  Some
>> were original 32-bit and got extended to 64-bit, and so are numbered bit
>> -32 down to bit 31 for consistency.  Others are 32-bit but numbered from
>> bit 32 down to bit 63.
> 
> Maybe they should have started with the MSB as bit -31 or -63, which
> would have allowed them to always use bit 0 for the LSB while having
> big-endian bit ordering.
> 

That's a very "outside the box thinking" solution!

> For bit ordering big-endian (as in the PowerPC manual) looked more
> wrong to me than for byte ordering; I thought that that was just a
> matter of getting used to the unfamiliar bit ordering, but maybe the
> advantage of little-endian becomes more apparent in bit ordering, and
> maybe that's why Motorola and Sun chose little-endian bit ordering
> despite having big-endian byte ordering.
> 
> For both bit and byte ordering, the advantage of little-endian shows
> up when there are several widths involved.  So why is it more obvious
> for bit-ordering?

I have certainly found big-endian bit numbering harder to get my head 
around than big-endian byte ordering.  One possible explanation is that 
with little-endian ordering, (1 << bit_no) gives you a 1 in the right 
bit number.  Another is that with little-endian bit ordering, the same 
bit number has the same value regardless of the size of the type.  And I 
work with electronics as well as software - virtually everything in 
hardware (except PowerPC microcontrollers!) uses little-endian bit 
numbering.  Smallest to largest, counting upwards from 0 or 1, is just 
more natural.

> 
> BTW, at least in my 32-bit PowerPC manual the claim is that PowerPC is
> a 64-bit architecture, and that the manual describes only the 32-bit
> subset.  Maybe the original Power was 32-bit.
> 

As I understand it - and my history here might not be completely 
accurate - PowerPC was specified for both 32-bit and 64-bit from early 
on, but first made in the 32-bit version.  There were quite a number of 
optional parts of the PowerPC architecture, including 64-bit width, 
floating point units, and support for little-endian data modes - IIRC 
these were referred to as books of various colours.  And yes, you could 
then have weird things like it being a 64-bit architecture where none of 
the 64-bit features were actually implemented.  One microcontroller I 
used had 64-bit GPRs, but almost no 64-bit instructions - I don't think 
you could even load or save all 64 bits at a time.  The only use of them 
was for transferring to and from the 64-bit double precision floating 
point registers (which could be loaded and saved in full).