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From: David Brown <david.brown@hesbynett.no>
Newsgroups: comp.arch
Subject: Re: 80286 protected mode
Date: Fri, 11 Oct 2024 16:54:13 +0200
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On 11/10/2024 14:13, Michael S wrote:
> On Fri, 11 Oct 2024 13:37:03 +0200
> David Brown <david.brown@hesbynett.no> wrote:
> 
>> On 10/10/2024 23:19, Brian G. Lucas wrote:
>>>
>>> Not applicable.
>>>    
>>
>> I don't understand what you mean by that.  /What/ is not applicable
>> to /what/ ?
>>
> 
> Brian probably meant to say that that it is not applicable to his my66k
> LLVM back end.
> 
> But I am pretty sure that what you suggest is applicable, but bad idea
> for memcpy/memmove routine that targets Arm+SVE.
> Dynamic dispatch based on concrete core features/identification, i.e.
> exactly the same mechanism that is done on "non-scalable"
> architectures, would provide better performance. And memcpy/memmove is
> certainly sufficiently important to justify an additional development
> effort.
> 

That explanation helps a little, but only a little.  I wasn't suggesting 
anything - or if I was, it was several posts ago and the context has 
long since been snipped.  Can you be more explicit about what you think 
I was suggesting, and why it might not be a good idea for targeting a 
"my66k" ISA?  (That is not a processor I have heard of, so you'll have 
to give a brief summary of any particular features that are relevant here.)