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From: Steve Goldstein <sgoldHAM@alum.mit.edu>
Newsgroups: sci.electronics.design
Subject: Re: AD5791
Date: Tue, 04 Jun 2024 21:16:54 -0400
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On Tue, 04 Jun 2024 17:15:03 -0700, john larkin <jl@650pot.com> wrote:

>On Tue, 4 Jun 2024 22:58:54 -0000 (UTC), Phil Hobbs
><pcdhSpamMeSenseless@electrooptical.net> wrote:
>
>>john larkin <jl@650pot.com> wrote:
>>> On Tue, 4 Jun 2024 21:53:13 +0200, Jeroen Belleman
>>> <jeroen@nospam.please> wrote:
>>> 
>>>> On 6/4/24 19:48, john larkin wrote:
>>>>> https://www.analog.com/en/products/ad5791.html
>>>>> 
>>>>> That's an amazing part. 20 bit DAC with 1 PPM accuracy and 0.05 PPM
>>>>> per degree C tempco.
>>>>> 
>>>>> My main gripe is its 3.4K output impedance, which makes a lot of
>>>>> Johnson noise. I suppose I could run a bunch in parallel.
>>>>> 
>>>> 
>>>> But you can power the chip from +/-16V and the LSB can be in
>>>> the 25uV ballpark. The Johnson noise of 7.5nV/rtHz doesn't
>>>> seem so bad then, does it?
>>>> 
>>>> Jeroen Belleman
>>> 
>>> That helps some. +-14v is about the limit on the references. We'd have
>>> to divide down to get our +-10v range back, and that would need some
>>> crazy stable resistors.
>>> 
>>> Looks like the other way to get the noise down would be to parallel a
>>> number of DACs. Times 8 channels! Ballpark $100 per DAC, which is
>>> actually feasible.
>>> 
>>> It will of course need crazy-low-noise hyper-stable references.
>>> 
>>> I wonder how ADI tests these parts. I can't buy a 1 PPM accurate DVM.
>>> 
>>> 
>>
>>Its quoted rise time is 1us, corresponding to a 3 dB bandwidth of about 350
>>kHz, or 550  kHz noise bandwidth. 
>>
>>With 7.5 nV 1-Hz noise, the total RMS noise should be about 5.6 uV, just
>>about half a LSB at 10V FS. 
>>
>>Not that shabby. 
>>
>>Cheers 
>>
>>Phil Hobbs 
>
>Three DACs in parallel with +-16 refs, divided down to +-10, pencils
>out around 3.2 nv/rthz.
>
>I'm going to need a very good preamp to measure the noise, something
>below 1 nv/rthz. Any ideas?

You can't use +-16 references, there's a 2.5V minimum headroom
requirement (datasheet page 4).  The part is tested and guaranteed
with +-10V references; it's _possible_ the nonlinearity will be a
little worse if you increase to, say, +-13.5V refs.  This is a
consequence of the design internals. I don't know if this was ever
characterized, you'd probably have to check it yourself.


You asked about testing.  I don't know how this specific part is
tested, but in general there are (at least) a couple of ways.

Many automatic testers have a super DVM available as a system
resource, often an HP3458A.  This works well but is slow, hence is an
expensive solution, i.e. it adds a lot of test time (cost).

Testers also often have a super-precision system DAC against which you
can make differential measurements.  With an in-amp gaining up the
difference between the system DAC and the DUT (Device Under Test) by
something like x100 you could use the system's fast ADC - 12 bits
might even be enough. There might need to be some averaging involved.
Even with waiting for the in-amp to settle this may still be easier
and faster than the system DVM.

Either way, testing to 20 bits takes time, and time costs money.

Thermocouple effects can become an issue in testing something like
this.  One of the first parts I designed at ADI was a very linear
custom VFC with very low offset and offset drift specs.  I also
designed and built the trim and test fixtures and needed to use
high-purity copper wire and Cd-Sn solder as the part dissipated a lot
of power (it was a chip-and-wire hybrid full of bipolar stuff - this
was the 1980s, before there was precision analog CMOS). It's probably
a lesser issue for AD5791 as the power dissipation is much lower than
my part had.  Probably just the Cd-Sn solder would have sufficed as it
had 1/10 the thermocouple effect against copper compared with Pd-Sn
solder, but the fixtures were one-offs so I went al -in.

I think I still have that roll of solder and the special flux. Now
it's hazmat.