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From: Bill Sloman <bill.sloman@ieee.org>
Newsgroups: sci.electronics.design
Subject: Re: High purity 1kHz oscillator
Date: Fri, 25 Oct 2024 18:16:26 +1100
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On 25/10/2024 3:25 pm, Bill Sloman wrote:
> On 25/10/2024 4:48 am, JM wrote:
>> On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote:
>>
>>> On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote:
>>>
>>>> On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde" 
>>>> <invalid@invalid.invalid> wrote:
>>>>
>>>>> But I suspect that component tolerances and mismatched FETs will 
>>>>> ruin it.
>>>>>
>>>>> Otherwise it should be easy to get 60dB down on unwanted harmonics 
>>>>> with a better filter.
>>>>>
>>>>> FWIW I likely won't be here for the next week.
>>>>>
>>>>
>>>> If you actually need a low distortion oscillator look for Viktor 
>>>> Mickevic's designs on diyaudio.   I've attached a schematic.
>>>>
>>>> PK
>>> 
>>>
>>> It seems that I have a problem posting encoded binariesto this group 
>>> with my provider.  Attached is a link instead.
>>>
>>> https://1drv.ms/u/c/1af24d72a509cd48/EakMPPRi-pdLgaAKtJ2rrwwBNMGZZsy84MV2QoH1dPcZJQ?e=o59V9a
>>
>> And that links to an incorrect schematic - the rectified output tap is 
>> connected to the wrong node.  Might be other errors..
> 
> Even so, the third harmonic is 78dB below the fundamental. The 
> simulation runs slowly on my computer, so it may take me a while to get 
> the schematic to where the designer intended it to be.
> 
> The choice of op amp is what I'd expect from an audio group - it does 
> seem to be a low distortion part.
> 
> I just seem to have wrecked the .raw file from the simulation, so it may 
> be a while before I have more to say.

The file wasn't wrecked, just huge (4.063 GB) and slow to load, despite 
the fact that I've a solid state disk on my computer put in to hold 
LTSpice .raw files and load them tolerably quickly.

The circuit uses a half-wave rectifier, then runs the error signal into 
an integrator wrapped around U4. C4 -at 6.8u - is a biggish integrating 
capacitor. R7 - at 120k - has the main purpose of stabilising the 
feeback loop controlling the amplitude and also delivers around 6mV of 
1kHz sinusoidal ripple into the gate of the FET. There about 12mV of 
1kHz sine wave across the FET channel so this minimises any channel 
modulation. Ingenious.

It would have been even move impressive if he'd intended to do that from 
the start, but R5 and R6 make look like it was an afterthought.

My feeling is that an AD734 could do better. Jim Williams did better 
with his FET controlled version, but I've no idea how.

78dB below the fundamental is respectable, but not impressive.

-- 
Bill Sloman, Sydney