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From: "Edward Rawde" <invalid@invalid.invalid>
Newsgroups: sci.electronics.design
Subject: Re: Final final 1kHz oscillator
Date: Sun, 10 Nov 2024 11:42:03 -0500
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"Cursitor Doom" <cd@notformail.com> wrote in message news:bs81jjt7d064jc1ktmvihgn30qkhf67taj@4ax.com...
> On Sun, 10 Nov 2024 00:49:36 -0500, "Edward Rawde"
> <invalid@invalid.invalid> wrote:
>
>>"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vgnkgg$3p31a$1@dont-email.me...
>>> On 9/11/2024 7:39 pm, Edward Rawde wrote:
>>>> "Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vgn4gm$3lcor$1@dont-email.me...
>>>>> On 9/11/2024 7:43 am, Edward Rawde wrote:
>>>>>> This is the simplest circuit I can come up with.
>>>>>> Harmonics are more than 80dB down in simulation.
>>>>>> FFT the last 30 seconds.
>>>>>> There is only one harmonic stopping me claiming 90dB but the exact FFT result can depend
>>>>>> on exactly how much output is selected for the FFT. You may see different results.
>>>>>>
>>
>>I have fixed my circuit but it raises more questions than it answers.
>>This circuit deliberately has no text and no u symbols so should be ready to simulate.
>>If you let it complete (about 20 minutes on a fast PC) the FFT should show at least 80dB purity and there aren't many harmonics
>>standing in the way of 90dB.
>>Startup isn't fast and it takes at least 20 seconds of simulation to fully settle.
>
> Spectral purity might be fine for all I can tell but the output
> amplitude is all over the place, even if the sim is left to run its
> full course.

In that case there is some unknown difference between your simulation and mine.
I just copy/pasted it directly from my post into sine.asc and ran the simulation.
The output is totally stable after 20 seconds and remains stable for the rest of the simulation.

One of the reasons this circuit can produce such a pure output is the filter components R12 and C6.
This makes it so that what is sent to the FET gate can't be much different from DC when the amplitude control loop is locked on to 
the correct control point.

But the filter components introduce a lot of lag (Bill also pointed this out).
So I tried another op amp as a lag compensator (which also inverted so I change to a P FET).
This worked fine and the output was almost immediately stable at the correct level.
But it also had the effect of introducing noise to the extent that I couldn't get below 50dB down.

So I looked for another solution.
One way to force the amplitude control loop to lock is to do just that.
Make it so that the control voltage can't go too far outside the required range.
That's what the diode clamp does.

Is your version of LTSpice fully up to date both main program and library?
If so then it wouldn't surprise me if differences between computers cause differences in simulation of this circuit.
Try adjusting the last two digits of the value of R9

>Also, what's the purpose of the 6 diodes in series at the
> top of the schematic? If you need to drop 4V there ought to be a more
> elegant way of doing it!
>
>
>
>>There are two things I don't understand about my own circuit.
>>
>>1. Why does LT1678 work fine in position U2 but LT1057 does not.
>>2. Why is the DC stabilization circuit (U3 and associated components) needed and would it work just the same in reality?
>>
>>Version 4
>>SHEET 1 2196 932
>>WIRE -64 -576 -96 -576
>>WIRE 48 -576 16 -576
>>WIRE 128 -528 112 -528
>>WIRE 208 -528 192 -528
>>WIRE 288 -528 272 -528
>>WIRE 368 -528 352 -528
>>WIRE 448 -528 432 -528
>>WIRE 528 -528 512 -528
>>WIRE 640 -528 592 -528
>>WIRE 640 -512 640 -528
>>WIRE -32 -464 -32 -480
>>WIRE 48 -448 48 -576
>>WIRE 48 -448 0 -448
>>WIRE -96 -432 -96 -576
>>WIRE -64 -432 -96 -432
>>WIRE 112 -416 112 -528
>>WIRE 112 -416 0 -416
>>WIRE 160 -416 112 -416
>>WIRE 208 -416 160 -416
>>WIRE 336 -416 288 -416
>>WIRE 400 -416 336 -416
>>WIRE 512 -416 400 -416
>>WIRE 624 -416 512 -416
>>WIRE -96 -384 -96 -432
>>WIRE -32 -384 -32 -400
>>WIRE 48 -368 48 -448
>>WIRE 336 -368 336 -416
>>WIRE 160 -352 160 -416
>>WIRE 400 -352 400 -416
>>WIRE 512 -288 512 -416
>>WIRE 624 -288 624 -416
>>WIRE -96 -272 -96 -304
>>WIRE -96 -272 -192 -272
>>WIRE -96 -240 -96 -272
>>WIRE 48 -240 48 -288
>>WIRE 160 -240 160 -288
>>WIRE 336 -240 336 -288
>>WIRE 400 -240 400 -288
>>WIRE -192 -176 -192 -272
>>WIRE -224 -128 -256 -128
>>WIRE -96 -128 -96 -160
>>WIRE -96 -128 -128 -128
>>WIRE -80 -128 -96 -128
>>WIRE 144 -128 -80 -128
>>WIRE 288 -128 224 -128
>>WIRE 352 -128 288 -128
>>WIRE 512 -128 512 -224
>>WIRE 512 -128 432 -128
>>WIRE -256 -48 -256 -128
>>WIRE -208 -48 -256 -48
>>WIRE -80 -48 -80 -128
>>WIRE -80 -48 -128 -48
>>WIRE 288 -16 288 -128
>>WIRE 288 -16 64 -16
>>WIRE 352 -16 288 -16
>>WIRE 512 -16 512 -128
>>WIRE 512 -16 432 -16
>>WIRE -256 0 -256 -48
>>WIRE 144 48 144 32
>>WIRE -240 96 -320 96
>>WIRE -176 96 -240 96
>>WIRE 64 96 64 -16
>>WIRE 112 96 64 96
>>WIRE 512 96 512 -16
>>WIRE 512 96 272 96
>>WIRE -32 128 -96 128
>>WIRE 112 128 -32 128
>>WIRE -320 144 -320 96
>>WIRE 624 144 624 -224
>>WIRE 656 144 624 144
>>WIRE 752 144 720 144
>>WIRE -176 160 -176 96
>>WIRE -32 160 -32 128
>>WIRE 112 160 64 160
>>WIRE 624 160 624 144
>>WIRE 624 160 272 160
>>WIRE 752 176 752 144
>>WIRE 144 224 144 208
>>WIRE -32 256 -32 224
>>WIRE 64 272 64 160
>>WIRE 160 272 64 272
>>WIRE 288 272 160 272
>>WIRE 400 272 352 272
>>WIRE 512 272 512 96
>>WIRE 512 272 480 272
>>WIRE 64 288 64 272
>>WIRE 160 288 160 272
>>WIRE 752 288 752 256
>>WIRE 880 288 752 288
>>WIRE 928 288 880 288
>>WIRE -320 320 -320 224
>>WIRE -320 320 -400 320
>>WIRE 928 320 928 288
>>WIRE -400 336 -400 320
>>WIRE -320 336 -320 320
>>WIRE -176 336 -176 224
>>WIRE -176 336 -320 336
>>WIRE -96 336 -96 128
>>WIRE 64 384 64 368
>>WIRE 160 384 160 352
>>WIRE 160 384 64 384
>>WIRE -320 416 -320 336
>>WIRE 64 416 64 384
>>WIRE -176 432 -176 336
>>WIRE 192 432 144 432
>>WIRE 304 432 272 432
>>WIRE 384 432 368 432
>>WIRE 928 432 928 400
>>WIRE 512 448 512 272
>>WIRE 624 448 624 160
>>WIRE 288 544 288 528
>>WIRE 384 560 384 432
>>WIRE 384 560 320 560
>>WIRE 624 560 624 512
>>WIRE 624 560 384 560
>>WIRE -96 576 -96 416
>>WIRE -48 576 -96 576
>>WIRE 32 576 -48 576
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