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From: Thomas Koenig <tkoenig@netcologne.de>
Newsgroups: comp.arch
Subject: Re: Reverse engineering of Intel branch predictors
Date: Wed, 13 Nov 2024 20:54:56 -0000 (UTC)
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Stefan Monnier <monnier@iro.umontreal.ca> schrieb:
> If you consider the two levels of language at play (the CPU view
> at the level of machine language and the interpreter's view of the
> bytecode language), IIUC the branch history of the CPU view ends up
> being a usable approximation of the bytecode-level instruction pointer,
> so for those sections of your bytecode-level program which are sufficiently
> repetitive, the prediction applied by the CPU can correctly predict the
> next bytecode.

To me, that looks like the bytecode is insufficiently expressive, if
an often-repeating sequence occurs :-)

In the presence of a good predictor, it would still be an interesting
question if a more compressed version would actually perform better.