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From: "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com>
Newsgroups: comp.arch
Subject: Re: Memory ordering
Date: Fri, 15 Nov 2024 12:42:15 -0800
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On 11/15/2024 5:24 AM, Michael S wrote:
> On Fri, 15 Nov 2024 03:17:22 -0800
> "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> wrote:
> 
>> On 11/14/2024 11:25 PM, Anton Ertl wrote:
>>> aph@littlepinkcloud.invalid writes:
>>>> Yes. That Alpha behaviour was a historic error. No one wants to do
>>>> that again.
>>>
>>> Was it an actual behaviour of any Alpha for public sale, or was it
>>> just the Alpha specification?  I certainly think that Alpha's lack
>>> of guarantees in memory ordering is a bad idea, and so is ARM's:
>>> "It's only 32 pages" <YfxXO.384093$EEm7.56154@fx16.iad>.  Seriously?
>>> Sequential consistency can be specified in one sentence: "The result
>>> of any execution is the same as if the operations of all the
>>> processors were executed in some sequential order, and the
>>> operations of each individual processor appear in this sequence in
>>> the order specified by its program."
>> [...]
>>
>>
>> Well, iirc, the Alpha is the only system that requires an explicit
>> membar for a RCU based algorithm. Even SPARC in RMO mode does not
>> need this. Iirc, akin to memory_order_consume in C++:
>>
>> https://en.cppreference.com/w/cpp/atomic/memory_order
>>
>> data dependent loads
>>
> 
> You response does not answer Anton's question.
> 

I guess not. Shit happens. ;^o