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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: Thomas Koenig <tkoenig@netcologne.de>
Newsgroups: comp.arch
Subject: Re: Keeping other stuff with addresses (was: What is an N-bit
 machine?)
Date: Sun, 1 Dec 2024 14:03:25 -0000 (UTC)
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Anton Ertl <anton@mips.complang.tuwien.ac.at> schrieb:
> Michael S <already5chosen@yahoo.com> writes:
>>On Sat, 30 Nov 2024 18:08:58 GMT
>>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>>> The widest arithmetic registers on AMD64 with AVX-512 are the ZMM
>>> registers with 512 bits each.  Sure, they are used for arithmetic on a
>>> sequence of individually narrower data, but the registers have 512
>>> bits nonetheless.
> ...
>>8x64 is not the same as 512.
>
> Alternative facts?

You can do eight 64-bit additions in AVX-512, but you cannot
do a 512-bit addition.

I think "ALU can add up to n-bit numbers" is a reasonable definition
for an n-bit architecture, which also fits the 16-bit 68000.
It does not fit the 360/30, or the Nova (but see de Castro's remark
on the latter).