Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: David Brown <david.brown@hesbynett.no>
Newsgroups: comp.lang.c
Subject: Re: question about linker
Date: Wed, 11 Dec 2024 21:35:06 +0100
Organization: A noiseless patient Spider
Lines: 33
Message-ID: <vjct1q$1n22j$1@dont-email.me>
References: <vi54e9$3ie0o$1@dont-email.me>
 <87frnbt9jn.fsf@nosuchdomain.example.com> <viaqh0$nm7q$1@dont-email.me>
 <877c8nt255.fsf@nosuchdomain.example.com> <viasv4$nm7q$2@dont-email.me>
 <vibr1l$vvjf$1@dont-email.me> <vic73f$1205f$1@dont-email.me>
 <20241129142810.00007920@yahoo.com> <vicfra$13nl4$1@dont-email.me>
 <20241129161517.000010b8@yahoo.com> <vicque$15ium$2@dont-email.me>
 <vid110$16hte$1@dont-email.me> <vifcll$1q9rj$1@dont-email.me>
 <vifiib$1s07p$1@dont-email.me> <viht27$2hgg1$3@dont-email.me>
 <vjb8e9$1973q$1@paganini.bofh.team> <20241211111856.00005d14@yahoo.com>
 <vjbunl$1h46m$1@dont-email.me> <vjcaad$1jcad$3@dont-email.me>
 <20241211192249.000079d6@yahoo.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Injection-Date: Wed, 11 Dec 2024 21:35:07 +0100 (CET)
Injection-Info: dont-email.me; posting-host="1162bbed0881445f404e150fd81906a9";
	logging-data="1804371"; mail-complaints-to="abuse@eternal-september.org";	posting-account="U2FsdGVkX185Ce2yNW4gkqxTKBevt40C3K87Io+mcT8="
User-Agent: Mozilla Thunderbird
Cancel-Lock: sha1:8poCjcr7uafsg1+ZNAxXjLMq8Y0=
In-Reply-To: <20241211192249.000079d6@yahoo.com>
Content-Language: en-GB
Bytes: 2977

On 11/12/2024 18:22, Michael S wrote:
> On Wed, 11 Dec 2024 16:15:25 +0100
> David Brown <david.brown@hesbynett.no> wrote:
> 
>>
>> Suffice it to say that as far as code generation is concerned, the
>> Cortex-A devices on the RPi's are completely different from the
>> Cortex-M devices in microcontrollers.  It's like comparing the 80286
>> with the Z80A.
>>
> 
> With exception of RPi1, saying so would be an exaggeration.
> RPi2 through 5 are technically capable to run Thumb2-encoded user level
> routines.

I did not know that the 64-bit Cortex-A devices could run 32-bit 
Thumb2-encoded instructions.  That does reduce the difference somewhat.

Compilers targeting 64-bit ARM would generate 64-bit (AArch64) 
instructions, which are of course significantly different.  But perhaps 
a compiler targeting 32-bit Cortex-A devices might be able to generate 
Thumb2 instructions.

However, you would not expect binary compatibility between code 
generated for a 32-bit Cortex-M device and a Cortex-A platform, even if 
it supports Thumb2 instructions - you have major differences in the ABI, 
memory layouts, and core features beyond the basic registers.


> May be, mutual incompatibility with MCUs would become true again in the
> next generation of RPi. But more likely it would not happen until RPi7.
>